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[Xen-changelog] [xen-unstable] [HVM] Fix an issue with APIC priority che

To: xen-changelog@xxxxxxxxxxxxxxxxxxx
Subject: [Xen-changelog] [xen-unstable] [HVM] Fix an issue with APIC priority checks.
From: Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>
Date: Wed, 02 Aug 2006 10:40:19 +0000
Delivery-date: Wed, 02 Aug 2006 03:43:28 -0700
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# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Node ID 637b6d60e792aaebe147fc900be4d27ddeb9bf74
# Parent  f5b9b8439012c49306069539aa8637d1a56a9b7d
[HVM] Fix an issue with APIC priority checks.

Signed-off-by; Yunhong Jiang <yunhong.jiang@xxxxxxxxx>
---
 xen/arch/x86/hvm/vlapic.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff -r f5b9b8439012 -r 637b6d60e792 xen/arch/x86/hvm/vlapic.c
--- a/xen/arch/x86/hvm/vlapic.c Wed Aug 02 10:03:04 2006 +0100
+++ b/xen/arch/x86/hvm/vlapic.c Wed Aug 02 10:04:27 2006 +0100
@@ -210,7 +210,7 @@ static int vlapic_accept_irq(struct vcpu
         if ( unlikely(vlapic == NULL || !vlapic_enabled(vlapic)) )
             break;
 
-        if ( test_and_set_bit(vector, &vlapic->irr[0]) )
+        if ( test_and_set_bit(vector, &vlapic->irr[0]) && level)
         {
             HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
               "level trig mode repeatedly for vector %d\n", vector);
@@ -922,7 +922,8 @@ int cpu_get_apic_interrupt(struct vcpu *
     {
         int highest_irr = vlapic_find_highest_irr(vlapic);
 
-        if ( highest_irr != -1 && highest_irr >= vlapic->processor_priority )
+        if ( highest_irr != -1 &&
+             ( (highest_irr & 0xF0) > vlapic->processor_priority ) )
         {
             if ( highest_irr < 0x10 )
             {
@@ -952,7 +953,8 @@ int cpu_has_apic_interrupt(struct vcpu* 
     if (vlapic && vlapic_enabled(vlapic)) {
         int highest_irr = vlapic_find_highest_irr(vlapic);
 
-        if (highest_irr != -1 && highest_irr >= vlapic->processor_priority) {
+        if ( highest_irr != -1 &&
+             ( (highest_irr & 0xF0) > vlapic->processor_priority ) ) {
             return 1;
         }
     }

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