[Xen-changelog] [xen-unstable] [HVM] Fix virtual apic irq distribution.

[Xen patchbot-unstable <patchbot-unstable@xxxxxxxxxxxxxxxxxxx>]

# HG changeset patch
# User kaf24@xxxxxxxxxxxxxxxxxxxx
# Node ID ab0cae84cfeceb5a71484167e4f1abc7b2896239
# Parent  bad506bc0c85fc9e52b95392c131ecb0d0e6a706
[HVM] Fix virtual apic irq distribution.
But currently we inject PIT irqs to cpu0 only. Also mute some warning
messages.

Signed-off-by: Yunhong Jiang <yunhong.jiang@xxxxxxxxx>
Signed-off-by: Xin Li <xin.b.li@xxxxxxxxx>
Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>
---
 xen/arch/x86/hvm/vioapic.c |   30 ++++++++++++++++++++++--------
 xen/arch/x86/hvm/vlapic.c  |   28 +++++++++++++++-------------
 2 files changed, 37 insertions(+), 21 deletions(-)

diff -r bad506bc0c85 -r ab0cae84cfec xen/arch/x86/hvm/vioapic.c
--- a/xen/arch/x86/hvm/vioapic.c        Tue Jun 27 15:22:55 2006 +0100
+++ b/xen/arch/x86/hvm/vioapic.c        Tue Jun 27 15:38:32 2006 +0100
@@ -40,6 +40,9 @@
 #include <asm/hvm/support.h>
 #include <asm/current.h>
 
+/* HACK: Route IRQ0 only to VCPU0 to prevent time jumps. */
+#define IRQ0_SPECIAL_ROUTING 1
+
 #if defined(__ia64__)
 #define        opt_hvm_debug_level     opt_vmx_debug_level
 #endif
@@ -392,12 +395,12 @@ static void ioapic_deliver(hvm_vioapic_t
     uint8_t trig_mode = s->redirtbl[irqno].RedirForm.trigmod;
     uint32_t deliver_bitmask;
 
-    HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "IOAPIC deliver: "
+    HVM_DBG_LOG(DBG_LEVEL_IOAPIC,
       "dest %x dest_mode %x delivery_mode %x vector %x trig_mode %x\n",
       dest, dest_mode, delivery_mode, vector, trig_mode);
 
-    deliver_bitmask =
-      ioapic_get_delivery_bitmask(s, dest, dest_mode, vector, delivery_mode);
+    deliver_bitmask = ioapic_get_delivery_bitmask(
+        s, dest, dest_mode, vector, delivery_mode);
 
     if (!deliver_bitmask) {
         HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic deliver "
@@ -411,15 +414,19 @@ static void ioapic_deliver(hvm_vioapic_t
     {
         struct vlapic* target;
 
-        target = apic_round_robin(
-                s->domain, dest_mode, vector, deliver_bitmask);
+#ifdef IRQ0_SPECIAL_ROUTING
+        if (irqno == 0)
+            target = s->lapic_info[0];
+        else
+#endif
+            target = apic_round_robin(s->domain, dest_mode,
+                                      vector, deliver_bitmask);
         if (target)
             ioapic_inj_irq(s, target, vector, trig_mode, delivery_mode);
-        else{ 
-            HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "ioapic deliver "
+        else
+            HVM_DBG_LOG(DBG_LEVEL_IOAPIC,
               "null round robin mask %x vector %x delivery_mode %x\n",
               deliver_bitmask, vector, deliver_bitmask);
-        }
         break;
     }
 
@@ -429,6 +436,13 @@ static void ioapic_deliver(hvm_vioapic_t
         uint8_t bit;
         for (bit = 0; bit < s->lapic_count; bit++) {
             if (deliver_bitmask & (1 << bit)) {
+#ifdef IRQ0_SPECIAL_ROUTING
+                if ( (irqno == 0) && (bit !=0) )
+                {
+                    printk("PIT irq to bit %x\n", bit);
+                    domain_crash_synchronous();
+                }
+#endif
                 if (s->lapic_info[bit]) {
                     ioapic_inj_irq(s, s->lapic_info[bit],
                                 vector, trig_mode, delivery_mode);
diff -r bad506bc0c85 -r ab0cae84cfec xen/arch/x86/hvm/vlapic.c
--- a/xen/arch/x86/hvm/vlapic.c Tue Jun 27 15:22:55 2006 +0100
+++ b/xen/arch/x86/hvm/vlapic.c Tue Jun 27 15:38:32 2006 +0100
@@ -212,18 +212,19 @@ static int vlapic_accept_irq(struct vcpu
 
         if ( test_and_set_bit(vector, &vlapic->irr[0]) )
         {
-            printk("<vlapic_accept_irq>"
-                   "level trig mode repeatedly for vector %d\n", vector);
+            HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
+              "level trig mode repeatedly for vector %d\n", vector);
             break;
         }
 
         if ( level )
         {
-            printk("<vlapic_accept_irq> level trig mode for vector %d\n",
-                   vector);
+            HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
+              "level trig mode for vector %d\n", vector);
             set_bit(vector, &vlapic->tmr[0]);
         }
         evtchn_set_pending(v, iopacket_port(v));
+
         result = 1;
         break;
 
@@ -308,8 +309,15 @@ struct vlapic* apic_round_robin(struct d
 
     old = next = d->arch.hvm_domain.round_info[vector];
 
-    do {
-        /* the vcpu array is arranged according to vcpu_id */
+    /* the vcpu array is arranged according to vcpu_id */
+    do
+    {
+        next++;
+        if ( !d->vcpu[next] ||
+             !test_bit(_VCPUF_initialised, &d->vcpu[next]->vcpu_flags) ||
+             next == MAX_VIRT_CPUS )
+            next = 0;
+
         if ( test_bit(next, &bitmap) )
         {
             target = d->vcpu[next]->arch.hvm_vcpu.vlapic;
@@ -321,12 +329,6 @@ struct vlapic* apic_round_robin(struct d
             }
             break;
         }
-
-        next ++;
-        if ( !d->vcpu[next] ||
-             !test_bit(_VCPUF_initialised, &d->vcpu[next]->vcpu_flags) ||
-             next == MAX_VIRT_CPUS )
-            next = 0;
     } while ( next != old );
 
     d->arch.hvm_domain.round_info[vector] = next;
@@ -956,7 +958,7 @@ int cpu_has_apic_interrupt(struct vcpu* 
     }
     return 0;
 }
- 
+
 void vlapic_post_injection(struct vcpu *v, int vector, int deliver_mode)
 {
     struct vlapic *vlapic = VLAPIC(v);

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