# HG changeset patch
# User djm@xxxxxxxxxxxxxxx
# Node ID ee15a2ae7f248aac26cf5a53fa6911d19375ef89
# Parent 5e142e1f41e61f76b2d77947ca5d0a6aabf334b8
Fix problem if itlb miss occurs when in metaphysical mode
diff -r 5e142e1f41e6 -r ee15a2ae7f24 xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c Mon Nov 14 17:41:41 2005
+++ b/xen/arch/ia64/xen/vcpu.c Wed Nov 16 22:44:49 2005
@@ -1290,12 +1290,12 @@
IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address, BOOLEAN is_data, UINT64
*pteval, UINT64 *itir, UINT64 *iha)
{
+ unsigned long region = address >> 61;
unsigned long pta, pte, rid, rr;
int i;
TR_ENTRY *trp;
- if (PSCB(vcpu,metaphysical_mode)) {
- unsigned long region = address >> 61;
+ if (PSCB(vcpu,metaphysical_mode) && !(!is_data && region)) {
// dom0 may generate an uncacheable physical address (msb=1)
if (region && ((region != 4) || (vcpu->domain != dom0))) {
// FIXME: This seems to happen even though it shouldn't. Need to track
@@ -1309,7 +1309,7 @@
phys_translate_count++;
return IA64_NO_FAULT;
}
- else if (!(address >> 61) && warn_region0_address) {
+ else if (!region && warn_region0_address) {
REGS *regs = vcpu_regs(vcpu);
unsigned long viip = PSCB(vcpu,iip);
unsigned long vipsr = PSCB(vcpu,ipsr);
@@ -1318,7 +1318,7 @@
printk("vcpu_translate: bad address %p, viip=%p, vipsr=%p,
iip=%p, ipsr=%p continuing\n", address, viip, vipsr, iip, ipsr);
}
- rr = PSCB(vcpu,rrs)[address>>61];
+ rr = PSCB(vcpu,rrs)[region];
rid = rr & RR_RID_MASK;
if (is_data) {
if (vcpu_quick_region_check(vcpu->arch.dtr_regions,address)) {
_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-changelog
|