# HG changeset patch
# User djm@xxxxxxxxxxxxxxx
# Node ID 0c1f966af47e0c4718b3d2a0376a591dfa2ef7f4
# Parent b2312c14f144c1767dd3cdb36ecf95e710d68bd6
Temporary patch to return dom0 stability
diff -r b2312c14f144 -r 0c1f966af47e xen/arch/ia64/xen/vcpu.c
--- a/xen/arch/ia64/xen/vcpu.c Wed Sep 7 16:51:28 2005
+++ b/xen/arch/ia64/xen/vcpu.c Thu Sep 8 13:24:08 2005
@@ -1,10 +1,16 @@
/*
* Virtualized CPU functions
*
- * Copyright (C) 2004 Hewlett-Packard Co.
+ * Copyright (C) 2004-2005 Hewlett-Packard Co.
* Dan Magenheimer (dan.magenheimer@xxxxxx)
*
*/
+
+#if 1
+// TEMPORARY PATCH for match_dtlb uses this, can be removed later
+// FIXME SMP
+int in_tpa = 0;
+#endif
#include <linux/sched.h>
#include <public/arch-ia64.h>
@@ -1317,8 +1323,10 @@
/* check 1-entry TLB */
if ((trp = match_dtlb(vcpu,address))) {
dtlb_translate_count++;
- //*pteval = trp->page_flags;
- *pteval = vcpu->arch.dtlb_pte;
+ if (vcpu->domain==dom0 && !in_tpa) *pteval = trp->page_flags;
+ else *pteval = vcpu->arch.dtlb_pte;
+ printf("DTLB MATCH... NEW, DOM%s, %s\n", vcpu->domain==dom0?
+ "0":"U", in_tpa?"vcpu_tpa":"ia64_do_page_fault");
*itir = trp->itir;
return IA64_NO_FAULT;
}
@@ -1369,7 +1377,9 @@
UINT64 pteval, itir, mask;
IA64FAULT fault;
+ in_tpa = 1;
fault = vcpu_translate(vcpu, vadr, 1, &pteval, &itir);
+ in_tpa = 0;
if (fault == IA64_NO_FAULT)
{
mask = itir_mask(itir);
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