# HG changeset patch
# User kaf24@xxxxxxxxxxxxxxxxxxxx
# Node ID 35ccaeaffeb77a68ed157c289fc1014cb394c8be
# Parent 3473b453dbaed1ca145a3e9ce38331c822ac65e1
Enable NX/XD feature for 32-bit PAE Xen.
Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>
diff -r 3473b453dbae -r 35ccaeaffeb7 xen/arch/x86/boot/x86_32.S
--- a/xen/arch/x86/boot/x86_32.S Wed Jul 13 08:45:26 2005
+++ b/xen/arch/x86/boot/x86_32.S Wed Jul 13 12:58:41 2005
@@ -2,6 +2,7 @@
#include <public/xen.h>
#include <asm/desc.h>
#include <asm/page.h>
+#include <asm/msr.h>
#define SECONDARY_CPU_FLAG 0xA5A5A5A5
@@ -57,13 +58,13 @@
/* Set up FPU. */
fninit
-
+
/* Set up CR4, except global flag which Intel requires should be */
/* left until after paging is enabled (IA32 Manual Vol. 3, Sec. 2.5) */
mov mmu_cr4_features-__PAGE_OFFSET,%ecx
and $0x7f,%cl # CR4.PGE (global enable)
mov %ecx,%cr4
-
+
cmp $(SECONDARY_CPU_FLAG),%ebx
je start_paging
@@ -125,6 +126,24 @@
loop 1b
start_paging:
+#ifdef CONFIG_X86_PAE
+ /* Enable Execute-Disable (NX/XD) support if it is available. */
+ push %ebx
+ mov $0x80000000,%eax
+ cpuid
+ cmp $0x80000000,%eax /* Any function > 0x80000000? */
+ jbe no_execute_disable
+ mov $0x80000001,%eax
+ cpuid
+ bt $20,%edx /* Execute Disable? */
+ jnc no_execute_disable
+ movl $MSR_EFER,%ecx
+ rdmsr
+ bts $_EFER_NX,%eax
+ wrmsr
+no_execute_disable:
+ pop %ebx
+#endif
mov $idle_pg_table-__PAGE_OFFSET,%eax
mov %eax,%cr3
mov $0x80050033,%eax /* hi-to-lo: PG,AM,WP,NE,ET,MP,PE */
diff -r 3473b453dbae -r 35ccaeaffeb7 xen/arch/x86/boot/x86_64.S
--- a/xen/arch/x86/boot/x86_64.S Wed Jul 13 08:45:26 2005
+++ b/xen/arch/x86/boot/x86_64.S Wed Jul 13 12:58:41 2005
@@ -63,7 +63,7 @@
/* Check for Multiboot bootloader */
cmp $0x2BADB002,%eax
jne not_multiboot
-
+
/* Save the Multiboot info structure for later use. */
mov %ebx,0x100300 # multiboot_ptr
@@ -91,7 +91,7 @@
mov %eax,%cr3
/* Set up EFER (Extended Feature Enable Register). */
- movl $MSR_EFER, %ecx
+ movl $MSR_EFER,%ecx
rdmsr
btsl $_EFER_LME,%eax /* Long Mode */
btsl $_EFER_SCE,%eax /* SYSCALL/SYSRET */
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