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[Xen-changelog] Read VMX configuration details from architectural regist

To: xen-changelog@xxxxxxxxxxxxxxxxxxx
Subject: [Xen-changelog] Read VMX configuration details from architectural registers.
From: BitKeeper Bot <riel@xxxxxxxxxxx>
Date: Fri, 20 May 2005 22:28:12 +0000
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ChangeSet 1.1494, 2005/05/20 23:28:12+01:00, kaf24@xxxxxxxxxxxxxxxxxxxx

        Read VMX configuration details from architectural registers.
        Signed-off-by: Nitin Kamble <nitin.a.kamble@xxxxxxxxx>
        Signed-off-by: Jun Nakajima <jun.nakajima@xxxxxxxxx>
        Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>



 arch/x86/vmx.c             |   16 ++++++++++++++--
 arch/x86/vmx_vmcs.c        |    6 ++++--
 include/asm-x86/msr.h      |    6 ++++++
 include/asm-x86/vmx_vmcs.h |    1 -
 4 files changed, 24 insertions(+), 5 deletions(-)


diff -Nru a/xen/arch/x86/vmx.c b/xen/arch/x86/vmx.c
--- a/xen/arch/x86/vmx.c        2005-05-20 20:03:49 -04:00
+++ b/xen/arch/x86/vmx.c        2005-05-20 20:03:49 -04:00
@@ -51,10 +51,10 @@
 int start_vmx()
 {
     struct vmcs_struct *vmcs;
-    unsigned long ecx;
+    u32 ecx;
+    u32 eax, edx;
     u64 phys_vmcs;      /* debugging */
 
-    vmcs_size = VMCS_SIZE;
     /*
      * Xen does not fill x86_capability words except 0.
      */
@@ -63,6 +63,18 @@
 
     if (!(test_bit(X86_FEATURE_VMXE, &boot_cpu_data.x86_capability)))
         return 0;
+ 
+    rdmsr(IA32_FEATURE_CONTROL_MSR, eax, edx);
+
+    if (eax & IA32_FEATURE_CONTROL_MSR_LOCK) {
+        if ((eax & IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON) == 0x0) {
+                printk("VMX disabled by Feature Control MSR.\n");
+               return 0;
+        }
+    }
+    else 
+        wrmsr(IA32_FEATURE_CONTROL_MSR, 
+              IA32_FEATURE_CONTROL_MSR_LOCK | 
IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON, 0);
 
     set_in_cr4(X86_CR4_VMXE);   /* Enable VMXE */
 
diff -Nru a/xen/arch/x86/vmx_vmcs.c b/xen/arch/x86/vmx_vmcs.c
--- a/xen/arch/x86/vmx_vmcs.c   2005-05-20 20:03:49 -04:00
+++ b/xen/arch/x86/vmx_vmcs.c   2005-05-20 20:03:49 -04:00
@@ -37,12 +37,14 @@
 struct vmcs_struct *alloc_vmcs(void) 
 {
     struct vmcs_struct *vmcs;
-    unsigned int cpu_sig = cpuid_eax(0x00000001);
+    u32 vmx_msr_low, vmx_msr_high;
 
+    rdmsr(MSR_IA32_VMX_BASIC_MSR, vmx_msr_low, vmx_msr_high);
+    vmcs_size = vmx_msr_high & 0x1fff;
     vmcs = (struct vmcs_struct *) alloc_xenheap_pages(get_order(vmcs_size)); 
     memset((char *) vmcs, 0, vmcs_size); /* don't remove this */
 
-    vmcs->vmcs_revision_id = (cpu_sig > 0xf41)? 3 : 1;
+    vmcs->vmcs_revision_id = vmx_msr_low;
     return vmcs;
 } 
 
diff -Nru a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h
--- a/xen/include/asm-x86/msr.h 2005-05-20 20:03:49 -04:00
+++ b/xen/include/asm-x86/msr.h 2005-05-20 20:03:49 -04:00
@@ -79,6 +79,12 @@
 #define MSR_IA32_PLATFORM_ID           0x17
 #define MSR_IA32_EBL_CR_POWERON                0x2a
 
+/* MSRs & bits used for VMX enabling */
+#define MSR_IA32_VMX_BASIC_MSR                  0x480
+#define IA32_FEATURE_CONTROL_MSR                0x3a
+#define IA32_FEATURE_CONTROL_MSR_LOCK           0x1
+#define IA32_FEATURE_CONTROL_MSR_ENABLE_VMXON   0x4
+
 /* AMD/K8 specific MSRs */ 
 #define MSR_EFER 0xc0000080            /* extended feature register */
 #define MSR_STAR 0xc0000081            /* legacy mode SYSCALL target */
diff -Nru a/xen/include/asm-x86/vmx_vmcs.h b/xen/include/asm-x86/vmx_vmcs.h
--- a/xen/include/asm-x86/vmx_vmcs.h    2005-05-20 20:03:49 -04:00
+++ b/xen/include/asm-x86/vmx_vmcs.h    2005-05-20 20:03:49 -04:00
@@ -31,7 +31,6 @@
 
 #define VMX_CPU_STATE_PG_ENABLED        0       
 #define        VMX_CPU_STATE_ASSIST_ENABLED    1
-#define VMCS_SIZE                       0x1000
 
 struct vmcs_struct {
     u32 vmcs_revision_id;

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