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[Xen-changelog] Move serial definitions into serial.h where they can be

To: xen-changelog@xxxxxxxxxxxxxxxxxxx
Subject: [Xen-changelog] Move serial definitions into serial.h where they can be picked up
From: BitKeeper Bot <riel@xxxxxxxxxxx>
Date: Sat, 07 May 2005 10:01:24 +0000
Delivery-date: Sat, 07 May 2005 11:02:45 +0000
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ChangeSet 1.1452, 2005/05/07 11:01:24+01:00, kaf24@xxxxxxxxxxxxxxxxxxxx

        Move serial definitions into serial.h where they can be picked up
        by arch-specific code.
        Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>



 drivers/char/serial.c     |   65 ----------------------------------------
 include/asm-ia64/serial.h |   63 ---------------------------------------
 include/xen/serial.h      |   74 +++++++++++++++++++++++++++++++++++++++++++---
 3 files changed, 70 insertions(+), 132 deletions(-)


diff -Nru a/xen/drivers/char/serial.c b/xen/drivers/char/serial.c
--- a/xen/drivers/char/serial.c 2005-05-07 07:03:15 -04:00
+++ b/xen/drivers/char/serial.c 2005-05-07 07:03:15 -04:00
@@ -26,71 +26,6 @@
 string_param("com1", opt_com1);
 string_param("com2", opt_com2);
 
-/* Register offsets */
-#define RBR             0x00    /* receive buffer       */
-#define THR             0x00    /* transmit holding     */
-#define IER             0x01    /* interrupt enable     */
-#define IIR             0x02    /* interrupt identity   */
-#define FCR             0x02    /* FIFO control         */
-#define LCR             0x03    /* line control         */
-#define MCR             0x04    /* Modem control        */
-#define LSR             0x05    /* line status          */
-#define MSR             0x06    /* Modem status         */
-#define DLL             0x00    /* divisor latch (ls) (DLAB=1) */
-#define DLM             0x01    /* divisor latch (ms) (DLAB=1) */
-
-/* Interrupt Enable Register */
-#define IER_ERDAI       0x01    /* rx data recv'd       */
-#define IER_ETHREI      0x02    /* tx reg. empty        */
-#define IER_ELSI        0x04    /* rx line status       */
-#define IER_EMSI        0x08    /* MODEM status         */
-
-/* FIFO control register */
-#define FCR_ENABLE      0x01    /* enable FIFO          */
-#define FCR_CLRX        0x02    /* clear Rx FIFO        */
-#define FCR_CLTX        0x04    /* clear Tx FIFO        */
-#define FCR_DMA         0x10    /* enter DMA mode       */
-#define FCR_TRG1        0x00    /* Rx FIFO trig lev 1   */
-#define FCR_TRG4        0x40    /* Rx FIFO trig lev 4   */
-#define FCR_TRG8        0x80    /* Rx FIFO trig lev 8   */
-#define FCR_TRG14       0xc0    /* Rx FIFO trig lev 14  */
-
-/* Line control register */
-#define LCR_DLAB        0x80    /* Divisor Latch Access */
-
-/* Modem Control Register */
-#define MCR_DTR         0x01    /* Data Terminal Ready  */
-#define MCR_RTS         0x02    /* Request to Send      */
-#define MCR_OUT2        0x08    /* OUT2: interrupt mask */
-
-/* Line Status Register */
-#define LSR_DR          0x01    /* Data ready           */
-#define LSR_OE          0x02    /* Overrun              */
-#define LSR_PE          0x04    /* Parity error         */
-#define LSR_FE          0x08    /* Framing error        */
-#define LSR_BI          0x10    /* Break                */
-#define LSR_THRE        0x20    /* Xmit hold reg empty  */
-#define LSR_TEMT        0x40    /* Xmitter empty        */
-#define LSR_ERR         0x80    /* Error                */
-
-/* These parity settings can be ORed directly into the LCR. */
-#define PARITY_NONE     (0<<3)
-#define PARITY_ODD      (1<<3)
-#define PARITY_EVEN     (3<<3)
-#define PARITY_MARK     (5<<3)
-#define PARITY_SPACE    (7<<3)
-
-#define RXBUFSZ 32
-#define MASK_RXBUF_IDX(_i) ((_i)&(RXBUFSZ-1))
-struct uart {
-    int              baud, data_bits, parity, stop_bits, io_base, irq;
-    serial_rx_fn     rx_lo, rx_hi, rx;
-    spinlock_t       lock;
-    unsigned char    rxbuf[RXBUFSZ];
-    unsigned int     rxbufp, rxbufc;
-    struct irqaction irqaction;
-};
-
 static struct uart com[2] = {
     { 0, 0, 0, 0, 0x3f8, 4,
       NULL, NULL, NULL,
diff -Nru a/xen/include/asm-ia64/serial.h b/xen/include/asm-ia64/serial.h
--- a/xen/include/asm-ia64/serial.h     2005-05-07 07:03:15 -04:00
+++ b/xen/include/asm-ia64/serial.h     2005-05-07 07:03:15 -04:00
@@ -21,69 +21,6 @@
 #define OPT_COM1_STR "115200"
 #define OPT_COM2_STR ""
 
-/* Register offsets */
-#define RBR             0x00    /* receive buffer       */
-#define THR             0x00    /* transmit holding     */
-#define IER             0x01    /* interrupt enable     */
-#define IIR             0x02    /* interrupt identity   */
-#define FCR             0x02    /* FIFO control         */
-#define LCR             0x03    /* line control         */
-#define MCR             0x04    /* Modem control        */
-#define LSR             0x05    /* line status          */
-#define MSR             0x06    /* Modem status         */
-#define DLL             0x00    /* divisor latch (ls) (DLAB=1) */
-#define DLM             0x01    /* divisor latch (ms) (DLAB=1) */
-
-/* Interrupt Enable Register */
-#define IER_ERDAI       0x01    /* rx data recv'd       */
-#define IER_ETHREI      0x02    /* tx reg. empty        */
-#define IER_ELSI        0x04    /* rx line status       */
-#define IER_EMSI        0x08    /* MODEM status         */
-
-/* FIFO control register */
-#define FCR_ENABLE      0x01    /* enable FIFO          */
-#define FCR_CLRX        0x02    /* clear Rx FIFO        */
-#define FCR_CLTX        0x04    /* clear Tx FIFO        */
-#define FCR_DMA         0x10    /* enter DMA mode       */
-#define FCR_TRG1        0x00    /* Rx FIFO trig lev 1   */
-#define FCR_TRG4        0x40    /* Rx FIFO trig lev 4   */
-#define FCR_TRG8        0x80    /* Rx FIFO trig lev 8   */
-#define FCR_TRG14       0xc0    /* Rx FIFO trig lev 14  */
-
-/* Line control register */
-#define LCR_DLAB        0x80    /* Divisor Latch Access */
-
-/* Modem Control Register */
-#define MCR_DTR         0x01    /* Data Terminal Ready  */
-#define MCR_RTS         0x02    /* Request to Send      */
-#define MCR_OUT2        0x08    /* OUT2: interrupt mask */
-
-/* Line Status Register */
-#define LSR_DR          0x01    /* Data ready           */
-#define LSR_OE          0x02    /* Overrun              */
-#define LSR_PE          0x04    /* Parity error         */
-#define LSR_FE          0x08    /* Framing error        */
-#define LSR_BI          0x10    /* Break                */
-#define LSR_THRE        0x20    /* Xmit hold reg empty  */
-#define LSR_TEMT        0x40    /* Xmitter empty        */
-#define LSR_ERR         0x80    /* Error                */
-
-/* These parity settings can be ORed directly into the LCR. */
-#define PARITY_NONE     (0<<3)
-#define PARITY_ODD      (1<<3)
-#define PARITY_EVEN     (3<<3)
-#define PARITY_MARK     (5<<3)
-#define PARITY_SPACE    (7<<3)
-
-#define RXBUFSZ 32
-#define MASK_RXBUF_IDX(_i) ((_i)&(RXBUFSZ-1))
-
-#define UART_ENABLED(_u) ((_u)->baud != 0)
-#define DISABLE_UART(_u) ((_u)->baud = 0)
-
-/* 'Serial handles' are comprise the following fields. */
-#define SERHND_IDX      (1<<0) /* COM1 or COM2?                           */
-
 unsigned char irq_serial_getc(int handle);
 
 void serial_force_unlock(int handle);
diff -Nru a/xen/include/xen/serial.h b/xen/include/xen/serial.h
--- a/xen/include/xen/serial.h  2005-05-07 07:03:15 -04:00
+++ b/xen/include/xen/serial.h  2005-05-07 07:03:15 -04:00
@@ -11,9 +11,79 @@
 #ifndef __XEN_SERIAL_H__
 #define __XEN_SERIAL_H__
 
+#include <xen/irq.h>
 #include <asm/regs.h>
 #include <asm/serial.h>
 
+/* Register offsets */
+#define RBR             0x00    /* receive buffer       */
+#define THR             0x00    /* transmit holding     */
+#define IER             0x01    /* interrupt enable     */
+#define IIR             0x02    /* interrupt identity   */
+#define FCR             0x02    /* FIFO control         */
+#define LCR             0x03    /* line control         */
+#define MCR             0x04    /* Modem control        */
+#define LSR             0x05    /* line status          */
+#define MSR             0x06    /* Modem status         */
+#define DLL             0x00    /* divisor latch (ls) (DLAB=1) */
+#define DLM             0x01    /* divisor latch (ms) (DLAB=1) */
+
+/* Interrupt Enable Register */
+#define IER_ERDAI       0x01    /* rx data recv'd       */
+#define IER_ETHREI      0x02    /* tx reg. empty        */
+#define IER_ELSI        0x04    /* rx line status       */
+#define IER_EMSI        0x08    /* MODEM status         */
+
+/* FIFO control register */
+#define FCR_ENABLE      0x01    /* enable FIFO          */
+#define FCR_CLRX        0x02    /* clear Rx FIFO        */
+#define FCR_CLTX        0x04    /* clear Tx FIFO        */
+#define FCR_DMA         0x10    /* enter DMA mode       */
+#define FCR_TRG1        0x00    /* Rx FIFO trig lev 1   */
+#define FCR_TRG4        0x40    /* Rx FIFO trig lev 4   */
+#define FCR_TRG8        0x80    /* Rx FIFO trig lev 8   */
+#define FCR_TRG14       0xc0    /* Rx FIFO trig lev 14  */
+
+/* Line control register */
+#define LCR_DLAB        0x80    /* Divisor Latch Access */
+
+/* Modem Control Register */
+#define MCR_DTR         0x01    /* Data Terminal Ready  */
+#define MCR_RTS         0x02    /* Request to Send      */
+#define MCR_OUT2        0x08    /* OUT2: interrupt mask */
+
+/* Line Status Register */
+#define LSR_DR          0x01    /* Data ready           */
+#define LSR_OE          0x02    /* Overrun              */
+#define LSR_PE          0x04    /* Parity error         */
+#define LSR_FE          0x08    /* Framing error        */
+#define LSR_BI          0x10    /* Break                */
+#define LSR_THRE        0x20    /* Xmit hold reg empty  */
+#define LSR_TEMT        0x40    /* Xmitter empty        */
+#define LSR_ERR         0x80    /* Error                */
+
+/* These parity settings can be ORed directly into the LCR. */
+#define PARITY_NONE     (0<<3)
+#define PARITY_ODD      (1<<3)
+#define PARITY_EVEN     (3<<3)
+#define PARITY_MARK     (5<<3)
+#define PARITY_SPACE    (7<<3)
+
+/* Register a character-receive hook on the specified COM port. */
+typedef void (*serial_rx_fn)(unsigned char, struct cpu_user_regs *);
+void serial_set_rx_handler(int handle, serial_rx_fn fn);
+
+#define RXBUFSZ 32
+#define MASK_RXBUF_IDX(_i) ((_i)&(RXBUFSZ-1))
+struct uart {
+    int              baud, data_bits, parity, stop_bits, io_base, irq;
+    serial_rx_fn     rx_lo, rx_hi, rx;
+    spinlock_t       lock;
+    unsigned char    rxbuf[RXBUFSZ];
+    unsigned int     rxbufp, rxbufc;
+    struct irqaction irqaction;
+};
+
 /* 'Serial handles' are comprise the following fields. */
 #define SERHND_IDX      (1<<0) /* COM1 or COM2?                           */
 #define SERHND_HI       (1<<1) /* Mux/demux each transferred char by MSB. */
@@ -26,10 +96,6 @@
 
 /* Takes a config string and creates a numeric handle on the COM port. */
 int parse_serial_handle(char *conf);
-
-/* Register a character-receive hook on the specified COM port. */
-typedef void (*serial_rx_fn)(unsigned char, struct cpu_user_regs *);
-void serial_set_rx_handler(int handle, serial_rx_fn fn);
 
 /* Transmit a single character via the specified COM port. */
 void serial_putc(int handle, unsigned char c);

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