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[Xen-bugs] [Bug 195] Many Timer ISR: Time went backwards logs

To: xen-bugs@xxxxxxxxxxxxxxxxxxx
Subject: [Xen-bugs] [Bug 195] Many Timer ISR: Time went backwards logs
From: bugzilla-daemon@xxxxxxxxxxxxxxxxxxx
Date: Mon, 3 Mar 2008 06:27:09 -0800
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http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=195


prarit@xxxxxxxxxx changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |prarit@xxxxxxxxxx




------- Comment #33 from prarit@xxxxxxxxxx  2008-03-03 06:27 -------

This is what is happening and I am currently working on a solution that will
use epochs for the shadow data structures.

The current Xen timing mechanism uses a common data area (the timer "shadow"
structure) that is written by HV and is read by dom0.

The HV launches four timers that run independent of dom0 (one percpu) that are
responsible for updating the common data area.

Assume (as there is in the case of amd-tyan-08) that there are four cpus {0, 1,
2, 3}.

A timer interrupt happens on cpu0.  The HV checks to see what timers have
expired and determines that the shadow update timer has expired.  The data is
updated.  Additionally, the HV also "passes" the interrupt down to dom0.

dom0 updates the global processed_system_time via a calculation that depends on
the updated shadow data.

A timer interrupt happens on cpu1.  The HV checks to see what timers have
expired, and in this cpu's case the shadow update timer has NOT expired, but
the
HV determines that the interrupt is to be passed down to dom0.

dom0 updates the global processed_system_time via a calculation that depends on
cpu1's *OLD* shadow data.

This causes a miscalculation of time on cpu1.
(Please note in the console output below that I modified the way the debug data
is output...)

(XEN) PRE0: tsc=3039265399 stime=1000034361 master=1000034361
(XEN) CUR0: tsc=5787569479 stime=2059723792 master=1565395832 -> -494327960
(XEN) PRE1: tsc=3067514902 stime=1010927101 master=1010927101
(XEN) CUR1: tsc=5787569035 stime=2059723804 master=1565404213 -> -494319591
(XEN) ---0: ab5080ff 8cf762d1 -2
(XEN) ---1: ab50bfe0 8bb0695b -2
(XEN) PRE3: tsc=3067585753 stime=1010954758 master=1010954758
(XEN) CUR3: tsc=5787697730 stime=2059775568 master=1565446118 -> -494329450
(XEN) ---3: ab5075cd 8bb05584 -2
(XEN) PRE2: tsc=3067551545 stime=1010941349 master=1010941349
(XEN) CUR2: tsc=5787633515 stime=2059749985 master=1565420975 -> -494329010
(XEN) ---2: ab50791b 8baffb7a -2

>>>> XEN updates shadow data structs for cpu 0, 1, 2, 3

[    2.264103] PCI: Setting latency timer of device 0000:00:08.0 to 64
[    2.264140] PCI: Setting latency timer of device 0000:00:09.0 to 64
[    2.264177] PCI: Setting latency timer of device 0000:00:0a.0 to 64
[    2.264213] PCI: Setting latency timer of device 0000:00:0b.0 to 64
[    2.264251] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
[    2.266344] Real Time Clock Driver v1.12ac
[    2.266371] Non-volatile memory driver v1.2
[    2.266372] Linux agpgart interface v0.101 (c) Dave Jones
[    2.266677] RAMDISK driver initialized: 16 RAM disks of 16384K size 4096
blocksize
[    2.266730] Xen virtual console successfully installed as ttyS0
[    2.266759] Event-channel device installed.
[    2.266762] Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
[    2.266763] ide: Assuming 33MHz system bus speed for PIO modes; override
with
idebus=xx
[    2.266774] SvrWks HT1000: IDE controller at PCI slot 0000:00:02.1
[    2.266787] SvrWks HT1000: chipset revision 0
[    2.266787] SvrWks HT1000: not 100% native mode: will probe irqs later
[    2.266795]     ide0: BM-DMA at 0xffa0-0xffa7, BIOS settings: hda:pio,
hdb:DMA
[    2.266807] Probing IDE interface ide0...
(XEN) PRE0: tsc=5787569479 stime=2059723792 master=1565395832
(XEN) CUR0: tsc=13051614511 stime=3059710050 master=3871936336 -> 812226286
(XEN) ---0: 00000000 a29314ad -1

>>>> Xen updates shadow data struct for cpu 0, and evaluates
processed_system_time based on new shadow data for cpu 0.

CPU 3, however, has old shadow data and attempts to calculate time.

[    3.055958] Timer ISR/3: Time went backwards
[    3.055960]      now = 13090293974 (in cycles)
[    3.055960]      overflow (0xffffffff) = 585897312
[    3.055961]      overflow (0xffffffff) = 0.585897312
[    3.055962] delta =     0.-812041871
[    3.055963] delta_cpu = 0.59923768
[    3.055964] offset = 0.996189412
[    3.055965] per_cpu shadow structure
[    3.055966] shadow->tsc_timestamp = 5787697730 (in cycles)
[    3.055966] shadow->system_timestamp = 2.59775568
[    3.055968] shadow->tsc_to_nsec_mul = 2343589252
[    3.055968] shadow->tsc_to_usec_mul = 2343589
[    3.055969] shadow->tsc_shift = -2
[    3.055970] shadow->version = 4
[    3.055970] global processed_system_time = 3.868000000
[    3.055971] percpu processed_system_time = 2.996034361
[    3.055973] percpu last_tsc_stamp = 12680092061
[    3.055973] stolen = -186696971
[    3.055974] blocked = 236896752
[    3.055975] other cpus percpu processed_system_time
[    3.055976]  0: 3868000000
[    3.055976]  1: 2536034361
[    3.055977]  2: 2548034361
[    3.055978]  3: 2996034361

>>>> Xen updates cpu 1, 2, 3's shadow data 

(XEN) PRE1: tsc=5787569035 stime=2059723804 master=1565404213
(XEN) CUR1: tsc=13118030068 stime=3059709703 master=3897545212 -> 837835509
(XEN) ---1: 00000000 a2e3bfbc -1
(XEN) PRE3: tsc=5787697730 stime=2059775568 master=1565446118
(XEN) CUR3: tsc=13118076672 stime=3059748102 master=3897562812 -> 837814710
(XEN) ---3: 00000000 a2e3c809 -1
(XEN) PRE2: tsc=5787633515 stime=2059749985 master=1565420975
(XEN) CUR2: tsc=13118197450 stime=3059737919 master=3897609746 -> 837871827
(XEN) ---2: 00000000 a2e4048e -1

>>>> No further errors are seen.


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