# HG changeset patch
# User Hollis Blanchard <hollisb@xxxxxxxxxx>
# Node ID 731044bd876be2148fcc7815a949692b8224dc83
# Parent 7516fd47bc5950fc4d30b2626872529fc9ec2bc0
[ppc] revert pmac_zilog changes, per xen-ppc-devel discussion
Signed-off-by: Hollis Blanchard <hollisb@xxxxxxxxxx>
diff -r 7516fd47bc59 -r 731044bd876b xen/arch/ppc/Rules.mk
--- a/xen/arch/ppc/Rules.mk Thu May 25 15:42:29 2006 -0400
+++ b/xen/arch/ppc/Rules.mk Tue May 30 11:29:54 2006 -0500
@@ -1,5 +1,4 @@ HAS_PPC64 := y
HAS_PPC64 := y
-pmac_zilog := y
CC := $(CROSS_COMPILE)gcc
LD := $(CROSS_COMPILE)ld
@@ -13,7 +12,6 @@ CFLAGS += -msoft-float -O2
CFLAGS += -msoft-float -O2
CFLAGS-$(debug) += -O0 # last one wins
CFLAGS-$(papr_vterm) += -DPAPR_VDEVICE -DPAPR_VTERM
-CFLAGS-$(pmac_zilog) += -DPMAC_ZILOG
#
# command to embed a binary inside a .o
diff -r 7516fd47bc59 -r 731044bd876b xen/arch/ppc/boot_of.c
--- a/xen/arch/ppc/boot_of.c Thu May 25 15:42:29 2006 -0400
+++ b/xen/arch/ppc/boot_of.c Tue May 30 11:29:54 2006 -0500
@@ -24,11 +24,12 @@
#include <xen/compile.h>
#include <xen/spinlock.h>
#include <xen/serial.h>
-#include <xen/string.h>
#include <public/of-devtree.h>
#include <asm/page.h>
#include <asm/io.h>
-#include "uart.h"
+#include <xen/string.h>
+#include <xen/serial.h>
+#include <asm-ppc/uart.h>
#include "exceptions.h"
static ulong of_vec;
@@ -41,10 +42,8 @@ struct uart uarts[] = {
struct uart uarts[] = {
{ .type = ns16550, .uart_name = "ns16550", .p_sign = "isa",
.gp_sign = "ht", .uart_init_func = ns16550_init },
-#ifdef PMAC_ZILOG
{ .type = pmac_zilog, .uart_name = "zilog", .p_sign = "escc",
.gp_sign = "mac-io", .uart_init_func = pmac_zilog_init },
-#endif
};
struct platform_serial_port global_serial_port;
diff -r 7516fd47bc59 -r 731044bd876b xen/arch/ppc/setup.c
--- a/xen/arch/ppc/setup.c Thu May 25 15:42:29 2006 -0400
+++ b/xen/arch/ppc/setup.c Tue May 30 11:29:54 2006 -0500
@@ -37,7 +37,7 @@
#include <asm/cache.h>
#include <asm/debugger.h>
#include <asm/delay.h>
-#include "uart.h"
+#include <asm-ppc/uart.h>
#include "exceptions.h"
#define DEBUG
diff -r 7516fd47bc59 -r 731044bd876b xen/drivers/char/Makefile
--- a/xen/drivers/char/Makefile Thu May 25 15:42:29 2006 -0400
+++ b/xen/drivers/char/Makefile Tue May 30 11:29:54 2006 -0500
@@ -1,6 +1,6 @@ obj-y += console.o
obj-y += console.o
obj-y += ns16550.o
-obj-$(pmac_zilog) += pmac_zilog.o
+obj-y += pmac_zilog.o
obj-y += serial.o
# Object file contains changeset and compiler information.
diff -r 7516fd47bc59 -r 731044bd876b xen/drivers/char/ns16550.c
--- a/xen/drivers/char/ns16550.c Thu May 25 15:42:29 2006 -0400
+++ b/xen/drivers/char/ns16550.c Tue May 30 11:29:54 2006 -0500
@@ -276,7 +276,7 @@ static struct uart_driver ns16550_driver
.irq = ns16550_irq
};
-static int parse_parity_char(int c)
+int parse_parity_char(int c)
{
switch ( c )
{
diff -r 7516fd47bc59 -r 731044bd876b xen/include/xen/serial.h
--- a/xen/include/xen/serial.h Thu May 25 15:42:29 2006 -0400
+++ b/xen/include/xen/serial.h Tue May 30 11:29:54 2006 -0500
@@ -8,6 +8,8 @@
#ifndef __XEN_SERIAL_H__
#define __XEN_SERIAL_H__
+
+#include <xen/spinlock.h>
struct cpu_user_regs;
@@ -128,7 +130,7 @@ struct ns16550_defaults {
unsigned long io_base; /* default io_base address */
};
void ns16550_init(int index, struct ns16550_defaults *defaults);
-extern void pmac_zilog_init(int index, struct ns16550_defaults *defaults);
+void pmac_zilog_init(int index, struct ns16550_defaults *defaults);
/* Baud rate was pre-configured before invoking the UART driver. */
#define BAUD_AUTO (-1)
diff -r 7516fd47bc59 -r 731044bd876b xen/drivers/char/pmac_zilog.c
--- a/xen/drivers/char/pmac_zilog.c Thu May 25 15:42:29 2006 -0400
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,432 +0,0 @@
-/*
- * Copyright (C) 2005 Jimi Xenidis <jimix@xxxxxxxxxxxxxx>, IBM Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * $Id: zilog.c,v 1.3 2005/05/05 20:51:04 mostrows Exp $
- */
-
-/*
- * linux/drivers/serial/pmac_zilog.c
- *
- * Driver for PowerMac Z85c30 based ESCC cell found in the
- * "macio" ASICs of various PowerMac models
- *
- * Copyright (C) 2003 Ben. Herrenschmidt (benh@xxxxxxxxxxxxxxxxxxx)
- *
- * Derived from drivers/macintosh/macserial.c by Paul Mackerras
- * and drivers/serial/sunzilog.c by David S. Miller
- *
- * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
- * adapted special tweaks needed for us. I don't think it's worth
- * merging back those though. The DMA code still has to get in
- * and once done, I expect that driver to remain fairly stable in
- * the long term, unless we change the driver model again...
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * 2004-08-06 Harald Welte <laforge@xxxxxxxxxxxx>
- * - Enable BREAK interrupt
- * - Add support for sysreq
- *
- * TODO: - Add DMA support
- * - Defer port shutdown to a few seconds after close
- * - maybe put something right into uap->clk_divisor
- */
-
-/******************************************************************************
- * pmac_zilog.c
- *
- * From rhype and linux
- *
- */
-
-#include <xen/config.h>
-#include <xen/init.h>
-#include <xen/irq.h>
-#include <xen/sched.h>
-#include <xen/serial.h>
-#include <xen/iocap.h>
-#include <asm/io.h>
-#include <xen/delay.h>
-#include "pmac_zilog.h"
-
-#undef ZILOG_DEBUG
-#ifdef ZILOG_DEBUG
-int of_printf(const char *fmt, ...);
-#define DBG(args...) of_printf(args)
-#else
-#define DBG(args...)
-#endif
-
-
-/* from rhype and linux */
-
-struct uart_pmac_port uaps[MAX_ZS_PORTS];
-
-extern int parse_parity_char(int c);
-
-#define PANIC(_f) \
- { \
- printk( "ERROR: " _f "\n"); \
- }
-
-/* internal */
-static char pmac_zilog_read_reg(struct uart_port *uart, int reg, int verbose)
-{
- if (verbose)
- DBG("%s: readb 0x%x\n", __func__, uart->remapped_io_base + reg);
- return readb(uart->remapped_io_base + reg);
-}
-
-/* internal */
-static void pmac_zilog_write_reg(struct uart_port *uart, int reg, char c, int
verbose)
-{
- if (verbose)
- DBG("%s: writeb 0x%x 0x%02x\n", __func__, uart->remapped_io_base +
reg, c);
- writeb(c, uart->remapped_io_base + reg);
-}
-
-/* internal */
-/* Note this is equivalent to linux read_zsreg followed by the bit AND */
-static int pmac_zilog_chkbit(struct uart_port *ops, int reg, int bit)
-{
- char c;
-
- // to read any register (but 0), first write the register number to the
- // control register, then read the control register
- //
- if (reg != 0) { pmac_zilog_write_reg(ops, REG_CONTROL, reg, 0); }
- c = pmac_zilog_read_reg(ops, REG_CONTROL, 0);
- return (c & bit) == bit;
-}
-
-/* internal from linux */
-/*
- * Load all registers to reprogram the port
- * This function must only be called when the TX is not busy. The UART
- * port lock must be held and local interrupts disabled.
- */
-static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
-{
- int i;
-
- if (ZS_IS_ASLEEP(uap))
- return;
-
- /* Let pending transmits finish. */
- for (i = 0; i < 1000; i++) {
- unsigned char stat = read_zsreg(uap, R1);
- if (stat & ALL_SNT)
- break;
- udelay(100);
- }
-
- ZS_CLEARERR(uap);
- zssync(uap);
- ZS_CLEARFIFO(uap);
- zssync(uap);
- ZS_CLEARERR(uap);
-
- /* Disable all interrupts. */
- write_zsreg(uap, R1,
- regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
-
- /* Set parity, sync config, stop bits, and clock divisor. */
- write_zsreg(uap, R4, regs[R4]);
-
- /* Set misc. TX/RX control bits. */
- write_zsreg(uap, R10, regs[R10]);
-
- /* Set TX/RX controls sans the enable bits. */
- write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
- write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
-
- /* now set R7 "prime" on ESCC */
- write_zsreg(uap, R15, regs[R15] | EN85C30);
- write_zsreg(uap, R7, regs[R7P]);
-
- /* make sure we use R7 "non-prime" on ESCC */
- write_zsreg(uap, R15, regs[R15] & ~EN85C30);
-
- /* Synchronous mode config. */
- write_zsreg(uap, R6, regs[R6]);
- write_zsreg(uap, R7, regs[R7]);
-
- /* Disable baud generator. */
- write_zsreg(uap, R14, regs[R14] & ~BRENAB);
-
- /* Clock mode control. */
- write_zsreg(uap, R11, regs[R11]);
-
- /* Lower and upper byte of baud rate generator divisor. */
- write_zsreg(uap, R12, regs[R12]);
- write_zsreg(uap, R13, regs[R13]);
-
- /* Now rewrite R14, with BRENAB (if set). */
- write_zsreg(uap, R14, regs[R14]);
-
- /* Reset external status interrupts. */
- write_zsreg(uap, R0, RES_EXT_INT);
- write_zsreg(uap, R0, RES_EXT_INT);
-
- /* Rewrite R3/R5, this time without enables masked. */
- write_zsreg(uap, R3, regs[R3]);
- write_zsreg(uap, R5, regs[R5]);
-
- /* Rewrite R1, this time without IRQ enabled masked. */
- write_zsreg(uap, R1, regs[R1]);
-
- /* Enable interrupts */
- write_zsreg(uap, R9, regs[R9]);
-}
-
-static void pmac_zilog_init_preirq(struct serial_port *port)
-{
- struct uart_pmac_port *uap = port->uart;
- struct uart_port *uart = &(uap->port);
- unsigned int divisor;
-
- uart->remapped_io_base = (char *)ioremap(uart->io_base, 8);
-
- /* No flow ctrl: DTR and RTS are both wedged high to keep remote happy. */
- /* parity, data bit (8 or bust) and stop bits todo */
-
-#define LINUX_PMAC_ZILOG_INIT
-#ifdef LINUX_PMAC_ZILOG_INIT
- /* from Linux's __pmz_startup(). Modified */
- {
- uap->flags = PMACZILOG_FLAG_IS_CHANNEL_A
- | PMACZILOG_FLAG_IS_IRDA
- ;
-
- memset(&uap->curregs, 0, sizeof(uap->curregs));
-
- /* Power up the SCC & underlying hardware (modem/irda) */
- //(void) pmz_set_scc_power(uap, 1); TODO?
-
- /* Nice buggy HW ... */
- //pmz_fix_zero_bug_scc(uap); TODO
-
- /* Reset the channel */
- uap->curregs[R9] = 0;
- write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
- zssync(uap);
- udelay(10);
- write_zsreg(uap, 9, 0);
- zssync(uap);
-
- /* Clear the interrupt registers */
- write_zsreg(uap, R1, 0);
- write_zsreg(uap, R0, ERR_RES);
- write_zsreg(uap, R0, ERR_RES);
- write_zsreg(uap, R0, RES_H_IUS);
- write_zsreg(uap, R0, RES_H_IUS);
-
- /* Setup some valid baud rate */
- uap->curregs[R4] = X16CLK | SB1;
- uap->curregs[R3] = Rx8;
- uap->curregs[R5] = Tx8 | RTS;
- if (!ZS_IS_IRDA(uap))
- uap->curregs[R5] |= DTR;
-
- /* baud divisor */
-#define UART_CLOCK_HZ 0
- if ( uart->baud == BAUD_AUTO ) {
- divisor = read_zsreg(uap, R12);
- divisor |= read_zsreg(uap, R13) << 8;
- uart->baud = UART_CLOCK_HZ / (divisor * 16);
- } else {
- /* Baud rate specified: program it into the divisor latch. */
- divisor = UART_CLOCK_HZ / (uart->baud * 16);
- uap->curregs[R12] = (char)divisor; /* baud divisor lower byte */
- uap->curregs[R13] = (char)(divisor >> 8); /* upper byte */
- }
-
- uap->curregs[R14] = BRENAB;
-
- /* Clear handshaking, enable BREAK interrupts */
- /* uap->curregs[R15] = BRKIE; we don't want interrupts */
-
- /* Master interrupt enable */
- /* uap->curregs[R9] |= NV | MIE; we don't want interrupts */
-
- pmz_load_zsregs(uap, uap->curregs);
-
- /* Enable receiver and transmitter. */
- write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
- write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
-
- /* Remember status for DCD/CTS changes */
- uap->prev_status = read_zsreg(uap, R0);
-
- }
-#endif /* #ifdef LINUX_PMAC_ZILOG_INIT */
-
- /* Enable and clear the FIFOs. Set a large trigger threshold. */
- port->tx_fifo_size = 2048;
-}
-
-static void pmac_zilog_init_postirq(struct serial_port *port)
-{
- PANIC("postirq!");
-}
-
-/* internal */
-static int pmac_zilog_write_avail(struct uart_port *ops)
-{
- if (pmac_zilog_chkbit(ops, 0, Tx_BUF_EMP) &&
- pmac_zilog_chkbit(ops, 1, ALL_SNT)) {
- return 2048;
- }
- return 0;
-}
-
-/* Transmit FIFO ready to receive up to @tx_fifo_size characters? */
-static int pmac_zilog_tx_empty(struct serial_port *port)
-{
- struct uart_pmac_port *uap = port->uart;
- struct uart_port *uart = &(uap->port);
-
- static int call_count = 0; // debug
- call_count++;
- if ((call_count < 1) ) {
- DBG("%s: count=%d\n", __func__, call_count);
- }
-
- return pmac_zilog_write_avail(uart);
-}
-
-static void pmac_zilog_putc(struct serial_port *port, char c)
-{
- struct uart_pmac_port *uap = port->uart;
- struct uart_port *uart = &(uap->port);
-
- static int call_count = 0; // debug
- call_count++;
- if ((call_count < 1 )) {
- DBG("%s: count=%d\n", __func__, call_count);
- }
-
- pmac_zilog_write_reg(uart, REG_DATA, c, 0);
-}
-
-/* internal */
-static int pmac_zilog_read_avail(struct uart_port *ops)
-{
- char c = pmac_zilog_read_reg(ops, REG_CONTROL, 0);
- if (c & Rx_CH_AV) {
- return 1;
- } else {
- return 0;
- }
-}
-
-/* Get a character from the serial line: returns 0 if none available. */
-static int pmac_zilog_getc(struct serial_port *port, char *pc)
-{
- struct uart_pmac_port *uap = port->uart;
- struct uart_port *uart = &(uap->port);
- int rc;
-
- static int call_count = 0; // debug
- call_count++;
- if ((call_count < 1)) {
- DBG("%s: count=%d\n", __func__, call_count);
- }
-
- if (pmac_zilog_read_avail(uart)) {
- *pc = pmac_zilog_read_reg(uart, REG_DATA, 0);
- rc = 1;
- } else {
- rc = 0;
- }
-
- return rc;
-}
-
-#define PARSE_ERR(_f, _a...) \
- do { \
- printk( "ERROR: " _f "\n" , ## _a ); \
- return; \
- } while ( 0 )
-
-static struct uart_driver pmac_zilog_driver = {
- .init_preirq = pmac_zilog_init_preirq,
- .init_postirq = pmac_zilog_init_postirq,
- .endboot = NULL,
- .tx_empty = pmac_zilog_tx_empty,
- .putc = pmac_zilog_putc,
- .getc = pmac_zilog_getc
-};
-
-/* internal */
-static void pmac_zilog_parse_port_config(struct uart_port *uart, char *conf)
-{
- /* Sanity checks. */
- if ( (uart->baud != BAUD_AUTO) &&
- ((uart->baud < 1200) || (uart->baud > 115200)) )
- PARSE_ERR("Baud rate %d outside supported range.", uart->baud);
- if ( (uart->data_bits < 5) || (uart->data_bits > 8) )
- PARSE_ERR("%d data bits are unsupported.", uart->data_bits);
- if ( (uart->stop_bits < 1) || (uart->stop_bits > 2) )
- PARSE_ERR("%d stop bits are unsupported.", uart->stop_bits);
- if ( uart->io_base == 0 )
- PARSE_ERR("I/O base address must be specified.");
-}
-
-void pmac_zilog_init(int index, struct ns16550_defaults *defaults)
-{
- if ( (index < 0) || (index >= MAX_ZS_PORTS) )
- return;
-
- memset(&uaps[index], 0, sizeof(struct uart_pmac_port));
-
- if ( defaults != NULL )
- {
- uaps[index].port.baud = defaults->baud;
- uaps[index].port.data_bits = defaults->data_bits;
- uaps[index].port.stop_bits = defaults->stop_bits;
- uaps[index].port.irq = defaults->irq;
- uaps[index].port.io_base = defaults->io_base;
- }
-
- pmac_zilog_parse_port_config(&(uaps[index].port), NULL);
-
- /* Register with generic serial driver. */
- serial_register_uart(index, &pmac_zilog_driver, &uaps[index]);
-}
-
-/*
- * Local variables:
- * mode: C
- * c-set-style: "BSD"
- * c-basic-offset: 4
- * tab-width: 4
- * indent-tabs-mode: nil
- * End:
- */
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