Re: [Xen-ia64-devel] pv_ops: ministate.h typo fix

[Isaku Yamahata <yamahata@xxxxxxxxxxxxx>]

On Thu, Mar 27, 2008 at 12:20:37PM +0800, Dong, Eddie wrote:

> > - shuffle instructions of XEN_BSW_1 and xen DO_XEN_MIN().
> >   Is this for producing better bundles? Please ellaborate on this.
> >   If so, I'll take as another patch.
> 
> ??? Which code are u talking for?

The following hunks. The instruction order was changed.
What's the purpose?

diff --git a/include/asm-ia64/xen/inst.h b/include/asm-ia64/xen/inst.h
index a8fb2ac..1e92d02 100644
--- a/include/asm-ia64/xen/inst.h
+++ b/include/asm-ia64/xen/inst.h
@@ -414,10 +414,10 @@
        movl r30 = XSI_B1NAT;           \
        ;;                              \
        ld8 r30 = [r30];                \
+       mov r31 = 1;                    \
        ;;                              \
        mov ar.unat = r30;              \
        movl r30 = XSI_BANKNUM;         \
-       mov r31 = 1;                    \
        ;;                              \
        st4 [r30] = r31;                \
        movl r30 = XSI_BANK1_R16;       \
diff --git a/include/asm-ia64/xen/minstate.h b/include/asm-ia64/xen/minstate.h
index 67bbf79..7cdebc2 100644
--- a/include/asm-ia64/xen/minstate.h
+++ b/include/asm-ia64/xen/minstate.h
@@ -25,17 +25,16 @@
  * Note that psr.ic is NOT turned on by this macro.  This is so that
  * we can pass interruption state as arguments to a handler.
  */
-#define DO_SAVE_MIN(__COVER,SAVE_IFS,EXTRA)                                    
                \
+#define DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA)                                      
                \
        mov r16=IA64_KR(CURRENT);       /* M */                                 
                \
        mov r27=ar.rsc;                 /* M */                                 
                \
        mov r20=r1;                     /* A */                                 
                \
        mov r25=ar.unat;                /* M */                                 
                \
        MOV_FROM_IPSR(r29);             /* M */                                 
                \
-       mov r26=ar.pfs;                 /* I */                                 
                \
        MOV_FROM_IIP(r28);              /* M */                                 
                \
        mov r21=ar.fpsr;                /* M */                                 
                \
-       __COVER;                        /* B;; (or nothing) */                  
                \
-       ;;                                                                      
                \
+       mov r26=ar.pfs;                 /* I */                                 
                \
+       COVER;                          /* B;; (or nothing) */                  
                \
        adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r16;                         
                \
        ;;                                                                      
                \
        ld1 r17=[r16];                          /* load 
current->thread.on_ustack flag */       \
@@ -80,17 +79,17 @@
 .mem.offset 8,0; st8.spill [r17]=r9,16;                                        
                        \
         ;;                                                                     
                \
 .mem.offset 0,0; st8.spill [r16]=r10,24;                                       
                \
+       movl r8=XSI_PRECOVER_IFS;                                               
                \
 .mem.offset 8,0; st8.spill [r17]=r11,24;                                       
                \
         ;;                                                                     
                \
        /* xen special handling for possibly lazy cover */                      
                \
        /* XXX: SAVE_MIN case in dispatch_ia32_handler: mov r30=r0 */           
                \
-       movl r8=XSI_PRECOVER_IFS;                                               
                \
        ;;                                                                      
                \
        ld8 r30=[r8];                                                           
                \
-       ;;                                                                      
                \
+(pUStk)        sub r18=r18,r22;        /* r18=RSE.ndirty*8 */                  
                        \
        st8 [r16]=r28,16;       /* save cr.iip */                               
                \
+       ;;      \
        st8 [r17]=r30,16;       /* save cr.ifs */                               
                \
-(pUStk)        sub r18=r18,r22;        /* r18=RSE.ndirty*8 */                  
                        \
        mov r8=ar.ccv;                                                          
                \
        mov r9=ar.csd;                                                          
                \
        mov r10=ar.ssd;                                                         
                \
@@ -131,7 +130,5 @@
        adds r2=IA64_PT_REGS_R16_OFFSET,r1;                                     
                \
        ;;                                                                      
                \
        movl r1=__gp;           /* establish kernel global pointer */           
                \
-       ;;                                                                      
                \
-       /*bsw.1;*/              /* switch back to bank 1 (must be last in insn 
group) */        \
        ;;
 #endif /* __IA64_ASM_PARAVIRTUALIZED_XEN */


-- 
yamahata

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