Cc: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
Cc: Tristan Gingold <tgingold@xxxxxxx>
Signed-off-by: Simon Horman <horms@xxxxxxxxxxxx>
---
Thu, 06 Dec 2007 16:15:27 +0900
* region register index needs to be bit shifted 61 bits to the left
* Use EFI region detection logic similar to other patches
Thu, 24 Jan 2008 16:02:33 +0900
* Check rr7 not rr6, as the rr changes don't really take
full affect until rr7 is switched - and checking on rr6 doesn't work
in alt_dtlb_miss
Index: xen-unstable.hg/xen/arch/ia64/xen/ivt.S
===================================================================
--- xen-unstable.hg.orig/xen/arch/ia64/xen/ivt.S 2008-01-25
13:31:34.000000000 +0900
+++ xen-unstable.hg/xen/arch/ia64/xen/ivt.S 2008-01-25 13:32:22.000000000
+0900
@@ -138,6 +138,24 @@ ENTRY(dtlb_miss)
/* If address belongs to VMM, go to alt tlb handler */
cmp.eq p6,p0=0x1e,r17
(p6) br.cond.spnt late_alt_dtlb_miss
+
+ // If it is an EFI address then must have XEN_EFI_RID set
+ // And if that is true, go to alt tlb handler
+ // ((r17 == 0x18 || r17 == 0x1c) && rr7 == XEN_EFI_RID)
+ // Note: rr7 == XEN_EFI_RID implies rr6 == XEN_EFI_RID
+ movl r23=7 << 61
+ ;;
+ cmp.eq p8,p0=0x18,r17 // 0xc...
+ mov r23=rr[r23]
+ ;;
+ cmp.eq.or p8,p0=0x1c,r17 // 0xe...
+ mov r25=XEN_EFI_RID
+ ;;
+ cmp.eq.and p8,p0=r25,r23 // rr7 == XEN_EFI_RID
+ ;;
+(p8) br.cond.spnt late_alt_dtlb_miss
+ ;;
+
br.cond.sptk fast_tlb_miss_reflect
;;
END(dtlb_miss)
--
--
Horms
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