[Xen-ia64-devel] [patch 4/8] Kexec: Handle alt_dtlb_miss for EFI in assembly

[Simon Horman <horms@xxxxxxxxxxxx>]

I have _no_ idea why, but for some reason
branching to page_fault and in turn ia64_do_page_fault (C)
does not work in this case.

Cc: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
Cc: Tristan Gingold <tgingold@xxxxxxx>
Signed-off-by: Simon Horman <horms@xxxxxxxxxxxx>

Index: xen-unstable.hg/xen/arch/ia64/xen/ivt.S
===================================================================
--- xen-unstable.hg.orig/xen/arch/ia64/xen/ivt.S        2007-09-10 
14:51:51.000000000 +0900
+++ xen-unstable.hg/xen/arch/ia64/xen/ivt.S     2007-09-10 14:58:17.000000000 
+0900
@@ -209,14 +209,23 @@ late_alt_dtlb_miss:
        extr.u r22=r16,59,5
        ;;
        dep r20=0,r20,IA64_ITIR_KEY,IA64_ITIR_KEY_LEN   // clear the key
-       cmp.ne p8,p0=0x1e,r22
+       cmp.ne p8,p0=0x1e,r22           // 0xf...
+       ;;
+       cmp.ne.and p8,p0=0x18,r22       // 0xc...
+       ;;
+       cmp.ne.and p8,p0=0x1c,r22       // 0xe...
+       ;;
 (p8)   br.cond.sptk page_fault
        ;;
        dep r21=-1,r21,IA64_PSR_ED_BIT,1
        or r19=r19,r17          // insert PTE control bits into r19
        mov cr.itir=r20         // set itir with cleared key
        ;;
-       dep r19=r18,r19,4,1     // set bit 4 (uncached) if access to UC area
+       cmp.ne p8,p0=r0,r18             // Xen UC bit set
+       ;;
+       cmp.eq.or p8,p0=0x18,r22        // Region 6 is UC for Linux
+       ;;
+(p8)   dep r19=-1,r19,4,1      // set bit 4 (uncached) if access to UC area
 (p6)   mov cr.ipsr=r21
        ;;
 (p7)   itc.d r19               // insert the TLB entry

-- 

-- 
Horms
  H: http://www.vergenet.net/~horms/
  W: http://www.valinux.co.jp/en/


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