Matthew Chapman write on 2006年11月30日 12:18:
> I found the problem...
>
> The real VHPT insertion is done based on the machine PTE returned from
> translate_domain_pte, which does the appropriate offset calculations.
>
> However, the insertion into the one-entry TLB uses the original PTE,
> but the page size has been reset to PAGE_SIZE [1]. Thus the entry in
> the one-entry TLB incorrectly maps the PAGE_SIZE sub-page which was
> faulted on to the PAGE_SIZE sub-page at the bottom of the superpage.
>
> I think it makes most sense to simply use the original itir when
> inserting into the single-entry TLB, as per attached patch. I've
> moved the vcpu_set_tr_entry calls up a level into vcpu_itc_d and
> vcpu_itc_i; the third caller previously used the 4 flag to specify
> "don't do that".
Hi Matt,
I found following code segment in function vcpu_itc_no_srlz,
If inserted into VHPT, the pagesize is forced to PAGE_SHIFT.
Anthony
vhpt_insert(vaddr, pte, PAGE_SHIFT << 2)
#ifdef VHPT_GLOBAL
if (vcpu->domain == dom0 && ((vaddr >> 61) == 7)) {
// FIXME: this is dangerous... vhpt_flush_address ensures these
// addresses never get flushed. More work needed if this
// ever happens.
//printk("vhpt_insert(%p,%p,%p)\n",vaddr,pte,1L<<logps);
if (logps > PAGE_SHIFT)
vhpt_multiple_insert(vaddr, pte, logps);
else
vhpt_insert(vaddr, pte, logps << 2);
}
// even if domain pagesize is larger than PAGE_SIZE, just put
// PAGE_SIZE mapping in the vhpt for now, else purging is complicated
else
vhpt_insert(vaddr, pte, PAGE_SHIFT << 2);
#endif
>
> Matt
>
> [1] In fact, this is enforced twice, once in translate_domain_pte and
> again in vcpu_itc_no_srlz.
_______________________________________________
Xen-ia64-devel mailing list
Xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-ia64-devel
|