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xen-ia64-devel
[Xen-ia64-devel] XEN_HYPER_ITC_D and XEN_HYPER_ITC_I in vhpt_miss
Hi,
while I was trying to understand the trap handler in
linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S
I saw the lines 205 ff:
#ifdef CONFIG_XEN
mov r24=r8
mov r8=r18
;;
(p10) XEN_HYPER_ITC_D
;;
(p11) XEN_HYPER_ITC_I
;;
mov r8=r24
;;
#else
(p10) itc.i r18 // insert the instruction TLB
entry
(p11) itc.d r18 // insert the data TLB entry
#endif
May it be that XEN_HYPER_ITC_D and XEN_HYPER_ITC_I are in the reverse order?
Dietmar.
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- [Xen-ia64-devel] XEN_HYPER_ITC_D and XEN_HYPER_ITC_I in vhpt_miss,
Dietmar Hahn <=
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