With my previous patch, seems you still need to apply the following patch to
xen.git. In this way, the GSI 0-15 are still setup by hypervisor, but it also
give one chance for dom0 to re-programme its polarity and trigger mode.
Xiantao
diff --git a/arch/x86/xen/pci.c b/arch/x86/xen/pci.c
index f999ad8..409bb66 100644
--- a/arch/x86/xen/pci.c
+++ b/arch/x86/xen/pci.c
@@ -80,17 +80,6 @@ void __init xen_setup_pirqs(void)
return;
}
- /* Pre-allocate legacy irqs */
- for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
- int trigger, polarity;
-
- if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
- continue;
-
- xen_register_gsi(irq,
- trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
- polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH);
- }
}
#ifdef CONFIG_PCI_MSI
Bastian Blank wrote:
> On Mon, Mar 15, 2010 at 12:30:32PM +0800, Zhang, Xiantao wrote:
>> Could you try the following patch ? Currently, the GSI 0-15 's
>> polarity and trigger mode are determined by hypervisor, and maybe
>> hypervisor and dom0 has no agreement to determin them. Just follow
>> dom0's setting with this patch, and I think it maybe work for you.
>
> No, it does not. mp_register_gsi also disallows reprogramming of
> already
> setup IO-APIC entries. But if I force it with the following hack, it
> works. So I would assume this a bug in the hypervisor to setup the GSI
> without knowing anything about it.
>
> Bastian
>
> diff -r 4152a3ce90a7 xen/arch/x86/mpparse.c
> --- a/xen/arch/x86/mpparse.c Thu Mar 11 17:40:35 2010 +0000
> +++ b/xen/arch/x86/mpparse.c Mon Mar 15 11:09:27 2010 +0100
> @@ -1143,5 +1143,5 @@
> if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx])
> { Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
> mp_ioapic_routing[ioapic].apic_id,
> ioapic_pin); + if (mp_ioapic_routing[ioapic].apic_id
> == 8 && ioapic_pin == 14); else return -EEXIST;
> }
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