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Re: [Xen-devel] HVM windows - PCI IRQ firing on both CPU's
| To: | James Harper <james.harper@xxxxxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx> |
|---|---|
| Subject: | Re: [Xen-devel] HVM windows - PCI IRQ firing on both CPU's |
| From: | Keir Fraser <keir.fraser@xxxxxxxxxxxxx> |
| Date: | Mon, 18 Aug 2008 13:26:50 +0100 |
| Cc: | |
| Delivery-date: | Mon, 18 Aug 2008 05:27:17 -0700 |
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| Thread-topic: | [Xen-devel] HVM windows - PCI IRQ firing on both CPU's |
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On 18/8/08 13:19, "James Harper" <james.harper@xxxxxxxxxxxxxxxx> wrote: > Just so I understand, even if I see the IRQ on CPU1, I should always > treat it as if it came in on CPU0? Yes. Only vcpu0's event-channel logic is wired into the virtual PIC/IOAPIC. Even if the IOAPIC then forwards the interrupt to a different VCPU, it's still vcpu0's event-channel status that initiated the interrupt. Other vcpus' event-channel statuses do not cause interrupts in HVM. > The lack of that would explain what I'm seeing. It sure would. -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel |
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