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[Xen-devel] RE: [PATCH] Fix lapic timer stop issue in deep C state

To: "Keir Fraser" <keir.fraser@xxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: [Xen-devel] RE: [PATCH] Fix lapic timer stop issue in deep C state
From: "Wei, Gang" <gang.wei@xxxxxxxxx>
Date: Wed, 21 May 2008 20:09:48 +0800
Cc: "Tian, Kevin" <kevin.tian@xxxxxxxxx>, "Yu, Ke" <ke.yu@xxxxxxxxx>
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Thread-topic: [PATCH] Fix lapic timer stop issue in deep C state
Using HPET direct FSB interrupt delivery is the right thing to do in
next step. I am not sure whether most existing HPET implementation
support it, but most future implementations should definitely support
it.

Jimmy

On Wednesday, May 21, 2008 5:55 PM, Keir Fraser wrote:
> Applied, after a lot of restructuring.
> 
> Also, would it be cleaner to set up the HPET to do direct FSB writes
to a
> local APIC, rather than hijacking PIT ch0? There are some corner cases
> where we leave PIT ch0 enabled after boot. Do most HPET
implementations
> support direct FSB interrupt delivery?
> 
>  -- Keir
> 
> On 20/5/08 16:22, "Wei, Gang" <gang.wei@xxxxxxxxx> wrote:
> 
>> Local APIC timer may stop at deep C state (C3/C4...) entry/exit. this
>> patch add the logic that use platform timer (HPET) to reenable local
>> APIC timer at C state entry/exit.
>> 
>> Signed-off-by: Wei Gang <gang.wei@xxxxxxxxx>
>> Signed-off-by: Yu Ke <ke.yu@xxxxxxxxx>

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