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[Xen-changelog] [xen-unstable] x86: tighten conditions under which writi

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Subject: [Xen-changelog] [xen-unstable] x86: tighten conditions under which writing certain MSRs is permitted
From: Xen patchbot-unstable <patchbot@xxxxxxx>
Date: Fri, 11 Feb 2011 06:20:18 -0800
Delivery-date: Fri, 11 Feb 2011 06:22:29 -0800
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# HG changeset patch
# User Keir Fraser <keir@xxxxxxx>
# Date 1297347563 0
# Node ID 5b18a72d292a066d1c2b9fff7e35fc1230cdec85
# Parent  332c1f73a594f6c17d9c252c4efc16e3b59a64ba
x86: tighten conditions under which writing certain MSRs is permitted

MSRs that control physical CPU aspects generally are pointless (and
possibly dangerous) to be written when the writer isn't sufficiently
aware that it's running virtualized.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
---
 xen/arch/x86/traps.c |   10 ++++++----
 1 files changed, 6 insertions(+), 4 deletions(-)

diff -r 332c1f73a594 -r 5b18a72d292a xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c      Thu Feb 10 14:14:24 2011 +0000
+++ b/xen/arch/x86/traps.c      Thu Feb 10 14:19:23 2011 +0000
@@ -2282,7 +2282,7 @@ static int emulate_privileged_op(struct 
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ||
                  boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x17 )
                 goto fail;
-            if ( !IS_PRIV(v->domain) )
+            if ( !IS_PRIV(v->domain) || !is_pinned_vcpu(v) )
                 break;
             if ( (rdmsr_safe(MSR_AMD64_NB_CFG, val) != 0) ||
                  (eax != (uint32_t)val) ||
@@ -2295,7 +2295,7 @@ static int emulate_privileged_op(struct 
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ||
                  boot_cpu_data.x86 < 0x10 || boot_cpu_data.x86 > 0x17 )
                 goto fail;
-            if ( !IS_PRIV(v->domain) )
+            if ( !IS_PRIV(v->domain) || !is_pinned_vcpu(v) )
                 break;
             if ( (rdmsr_safe(MSR_FAM10H_MMIO_CONF_BASE, val) != 0) )
                 goto fail;
@@ -2317,6 +2317,8 @@ static int emulate_privileged_op(struct 
         case MSR_IA32_UCODE_REV:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
                 goto fail;
+            if ( !IS_PRIV(v->domain) || !is_pinned_vcpu(v) )
+                break;
             if ( rdmsr_safe(regs->ecx, val) )
                 goto fail;
             if ( msr_content )
@@ -2324,7 +2326,7 @@ static int emulate_privileged_op(struct 
             break;
         case MSR_IA32_MISC_ENABLE:
             if ( rdmsr_safe(regs->ecx, val) )
-                goto invalid;
+                goto fail;
             val = guest_misc_enable(val);
             if ( msr_content != val )
                 goto invalid;
@@ -2351,7 +2353,7 @@ static int emulate_privileged_op(struct 
         case MSR_IA32_ENERGY_PERF_BIAS:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
                 goto fail;
-            if ( (v->domain->domain_id != 0) || !is_pinned_vcpu(v) )
+            if ( !IS_PRIV(v->domain) || !is_pinned_vcpu(v) )
                 break;
             if ( wrmsr_safe(regs->ecx, msr_content) != 0 )
                 goto fail;

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