# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1250243636 -3600
# Node ID 2846a6cde181beac5880e0bce0c5b210ef36a995
# Parent f9bc83a42799c4693e1c6a5e889a70a837b69521
mmconfig: Fix x86_64 ioremap base_address
Current mmconfig has some problems of remapped range.
a) In the case of broken MCFG tables on Asus etc., we need to remap
256M range, but currently only remap 1M.
b) The base address always corresponds to bus number 0, but currently
we are assuming it corresponds to start bus number.
This patch fixes the above problems.
(akpm: Arjan suggests that if the MCFG table is broken we just
shouldn't use it, rather than try to work around things).
Back-ported to 2.6.18 by Simon Horman
Signed-off-by: OGAWA Hirofumi <hirofumi@xxxxxxxxxxxxxxxxxx>
Signed-off-by: Andi Kleen <ak@xxxxxxx>
Cc: Arjan van de Ven <arjan@xxxxxxxxxxxxxxx>
Cc: Andi Kleen <ak@xxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxx>
Signed-off-by: Simon Horman <horms@xxxxxxxxxxxx>
---
arch/x86_64/pci/mmconfig.c | 42 ++++++++++++++++++++++++++++++++----------
1 files changed, 32 insertions(+), 10 deletions(-)
diff -r f9bc83a42799 -r 2846a6cde181 arch/x86_64/pci/mmconfig.c
--- a/arch/x86_64/pci/mmconfig.c Wed Aug 05 12:05:34 2009 +0100
+++ b/arch/x86_64/pci/mmconfig.c Fri Aug 14 10:53:56 2009 +0100
@@ -29,6 +29,36 @@ struct mmcfg_virt {
char __iomem *virt;
};
static struct mmcfg_virt *pci_mmcfg_virt;
+
+static inline int mcfg_broken(void)
+{
+ struct acpi_table_mcfg_config *cfg = &pci_mmcfg_config[0];
+
+ /* Handle more broken MCFG tables on Asus etc.
+ They only contain a single entry for bus 0-0. Assume
+ this applies to all busses. */
+ if (pci_mmcfg_config_num == 1 &&
+ cfg->pci_segment_group_number == 0 &&
+ (cfg->start_bus_number | cfg->end_bus_number) == 0)
+ return 1;
+ return 0;
+}
+
+static void __iomem * __init mcfg_ioremap(struct acpi_table_mcfg_config *cfg)
+{
+ void __iomem *addr;
+ u32 size;
+
+ size = (cfg->end_bus_number + 1) << 20;
+ printk(KERN_INFO "%s: end_bus_number=%d\n", __func__,
+ cfg->end_bus_number);
+ addr = ioremap_nocache(cfg->base_address, size);
+ if (addr) {
+ printk(KERN_INFO "PCI: Using MMCONFIG at %Lx - %Lx\n",
+ cfg->base_address, cfg->base_address + size - 1);
+ }
+ return addr;
+}
static char __iomem *get_virt(unsigned int seg, unsigned bus)
{
@@ -47,13 +77,7 @@ static char __iomem *get_virt(unsigned i
return pci_mmcfg_virt[cfg_num].virt;
}
- /* Handle more broken MCFG tables on Asus etc.
- They only contain a single entry for bus 0-0. Assume
- this applies to all busses. */
- cfg = &pci_mmcfg_config[0];
- if (pci_mmcfg_config_num == 1 &&
- cfg->pci_segment_group_number == 0 &&
- (cfg->start_bus_number | cfg->end_bus_number) == 0)
+ if (mcfg_broken())
return pci_mmcfg_virt[0].virt;
/* Fall back to type 0 */
@@ -194,14 +218,12 @@ void __init pci_mmcfg_init(void)
}
for (i = 0; i < pci_mmcfg_config_num; ++i) {
pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i];
- pci_mmcfg_virt[i].virt =
ioremap_nocache(pci_mmcfg_config[i].base_address,
- MMCONFIG_APER_MAX);
+ pci_mmcfg_virt[i].virt = mcfg_ioremap(&pci_mmcfg_config[i]);
if (!pci_mmcfg_virt[i].virt) {
printk("PCI: Cannot map mmconfig aperture for segment
%d\n",
pci_mmcfg_config[i].pci_segment_group_number);
return;
}
- printk(KERN_INFO "PCI: Using MMCONFIG at %x\n",
pci_mmcfg_config[i].base_address);
}
unreachable_devices();
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