# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 18b0911d936d89bffad2e145dd62a440c9a953e7
# Parent cfe20f41f043a4c9d4166f117fd3f17adf706224
[IA64] warning cleanup
Signed-off-by: Alex Williamson <alex.williamson@xxxxxx>
diff -r cfe20f41f043 -r 18b0911d936d xen/arch/ia64/vmx/mm.c
--- a/xen/arch/ia64/vmx/mm.c Wed Mar 1 15:29:00 2006
+++ b/xen/arch/ia64/vmx/mm.c Wed Mar 1 16:53:17 2006
@@ -106,11 +106,11 @@
u64 mfn, gpfn;
VCPU *vcpu;
mmu_update_t req;
- ia64_rr rr;
+ /* ia64_rr rr; */
thash_cb_t *hcb;
- thash_data_t entry={0},*ovl;
+ /* thash_data_t entry={0},*ovl; */
vcpu = current;
- search_section_t sections;
+ /* search_section_t sections; */
hcb = vmx_vcpu_get_vtlb(vcpu);
for ( i = 0; i < count; i++ )
{
diff -r cfe20f41f043 -r 18b0911d936d xen/arch/ia64/vmx/vmmu.c
--- a/xen/arch/ia64/vmx/vmmu.c Wed Mar 1 15:29:00 2006
+++ b/xen/arch/ia64/vmx/vmmu.c Wed Mar 1 16:53:17 2006
@@ -477,7 +477,7 @@
thash_cb_t *hcb;
search_section_t sections;
ia64_rr vrr;
- u64 mfn,psr;
+ /* u64 mfn,psr; */
hcb = vmx_vcpu_get_vtlb(vcpu);
data.page_flags=pte & ~PAGE_FLAGS_RV_MASK;
@@ -527,7 +527,7 @@
thash_cb_t *hcb;
search_section_t sections;
ia64_rr vrr;
- u64 mfn,psr;
+ /* u64 mfn,psr; */
hcb = vmx_vcpu_get_vtlb(vcpu);
data.page_flags=pte & ~PAGE_FLAGS_RV_MASK;
diff -r cfe20f41f043 -r 18b0911d936d xen/arch/ia64/vmx/vtlb.c
--- a/xen/arch/ia64/vmx/vtlb.c Wed Mar 1 15:29:00 2006
+++ b/xen/arch/ia64/vmx/vtlb.c Wed Mar 1 16:53:17 2006
@@ -29,6 +29,7 @@
#include <linux/interrupt.h>
#include <asm/vmx_vcpu.h>
#include <asm/vmmu.h>
+#include <asm/tlbflush.h>
#define MAX_CCH_LENGTH 40
thash_data_t *__alloc_chain(thash_cb_t *, thash_data_t *);
@@ -52,7 +53,7 @@
if ( (p = hcb->cch_freelist) != NULL ) {
hcb->cch_freelist = p->next;
- return p;
+ return (thash_data_t *)p;
}else{
return NULL;
}
@@ -295,7 +296,7 @@
thash_data_t *tlb, u64 va,
thash_data_t *vhpt)
{
- u64 pages,mfn,padr,pte;
+ u64 padr,pte;
// ia64_rr vrr;
ASSERT ( hcb->ht == THASH_VHPT );
// vrr = (hcb->get_rr_fn)(hcb->vcpu,va);
@@ -340,7 +341,7 @@
//panic("Can't convert to machine VHPT entry\n");
}
- hash_table = ia64_thash(va);
+ hash_table = (thash_data_t *)ia64_thash(va);
if( INVALID_VHPT(hash_table) ) {
*hash_table = vhpt_entry;
hash_table->next = 0;
@@ -393,7 +394,7 @@
{
thash_data_t *hash;
u64 tag;
- hash = ia64_thash(va);
+ hash = (thash_data_t *)ia64_thash(va);
tag = ia64_ttag(va);
while(hash){
if(hash->etag == tag)
@@ -456,7 +457,7 @@
start = va & (-size);
end = start + size;
while(start < end){
- hash_table = ia64_thash(start);
+ hash_table = (thash_data_t *)ia64_thash(start);
tag = ia64_ttag(start);
if(hash_table->etag == tag ){
__rem_hash_head(hcb, hash_table);
@@ -566,10 +567,10 @@
void vtlb_insert(thash_cb_t *hcb, thash_data_t *entry, u64 va)
{
thash_data_t *hash_table, *cch;
- int flag;
+ /* int flag; */
ia64_rr vrr;
- u64 gppn;
- u64 ppns, ppne, tag;
+ /* u64 gppn, ppns, ppne; */
+ u64 tag;
vrr=vmx_vcpu_rr(current, va);
if (vrr.ps != entry->ps) {
// machine_tlb_insert(hcb->vcpu, entry);
@@ -716,6 +717,7 @@
return cch;
}
}
+ */
/*
* Purge one hash line (include the entry in hash table).
@@ -950,9 +952,10 @@
search_section_t p_sect,
CACHE_LINE_TYPE cl)
{
+/*
thash_data_t *ovl;
-/* ovl = (hcb->find_overlap)(hcb, va, PSIZE(ps), rid, cl, p_sect);
+ ovl = (hcb->find_overlap)(hcb, va, PSIZE(ps), rid, cl, p_sect);
while ( ovl != NULL ) {
(hcb->rem_hash)(hcb, ovl);
ovl = (hcb->next_overlap)(hcb);
@@ -968,7 +971,7 @@
*/
void thash_purge_and_insert(thash_cb_t *hcb, thash_data_t *in, u64 va)
{
- thash_data_t *ovl;
+ /* thash_data_t *ovl; */
search_section_t sections;
#ifdef XEN_DEBUGGER
@@ -1040,9 +1043,10 @@
// TODO: add sections.
void thash_purge_all(thash_cb_t *hcb)
{
- thash_data_t *hash_table, *entry;
+ thash_data_t *hash_table;
+ /* thash_data_t *entry; */
thash_cb_t *vhpt;
- u64 i, start, end;
+ /* u64 i, start, end; */
#ifdef VTLB_DEBUG
extern u64 sanity_check;
diff -r cfe20f41f043 -r 18b0911d936d xen/include/asm-ia64/vmmu.h
--- a/xen/include/asm-ia64/vmmu.h Wed Mar 1 15:29:00 2006
+++ b/xen/include/asm-ia64/vmmu.h Wed Mar 1 16:53:17 2006
@@ -30,10 +30,6 @@
#define VCPU_VHPT_SHIFT (24) // 16M for VTLB
#define VCPU_VHPT_SIZE (1UL<<VCPU_VHPT_SHIFT)
#define VCPU_VHPT_ORDER (VCPU_VHPT_SHIFT - PAGE_SHIFT)
-
-#define PTA_BASE_SHIFT (15)
-
-
#ifndef __ASSEMBLY__
@@ -384,6 +380,7 @@
extern thash_cb_t *init_domain_tlb(struct vcpu *d);
extern thash_data_t * vsa_thash(PTA vpta, u64 va, u64 vrr, u64 *tag);
extern thash_data_t * vhpt_lookup(u64 va);
+extern void machine_tlb_purge(u64 va, u64 ps);
//#define VTLB_DEBUG
#ifdef VTLB_DEBUG
diff -r cfe20f41f043 -r 18b0911d936d xen/include/asm-ia64/vmx_vcpu.h
--- a/xen/include/asm-ia64/vmx_vcpu.h Wed Mar 1 15:29:00 2006
+++ b/xen/include/asm-ia64/vmx_vcpu.h Wed Mar 1 16:53:17 2006
@@ -120,6 +120,14 @@
extern void vcpu_load_kernel_regs(VCPU *vcpu);
extern IA64FAULT vmx_vcpu_increment_iip(VCPU *vcpu);
extern void vmx_switch_rr7(unsigned long ,shared_info_t*,void *,void *,void *);
+
+extern void dtlb_fault (VCPU *vcpu, u64 vadr);
+extern void nested_dtlb (VCPU *vcpu);
+extern void alt_dtlb (VCPU *vcpu, u64 vadr);
+extern void dvhpt_fault (VCPU *vcpu, u64 vadr);
+extern void dnat_page_consumption (VCPU *vcpu, uint64_t vadr);
+extern void page_not_present(VCPU *vcpu, u64 vadr);
+
/**************************************************************************
VCPU control register access routines
**************************************************************************/
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