# HG changeset patch
# User awilliam@xxxxxxxxxxx
# Node ID 67ea7868089b2e351973fdab60d6eba2fdabc260
# Parent 0f59ace5442c9e8365e974cdbfb6e0783e74ea1b
[IA64] Clean up warnings related to VTi code. (header files)
This patch adds some functions' prototype declaration in corresponding
header file and removes issues suce as redefinition of some macros.
Signed-off-by: Zhang Xiantao <xiantao.zhang@xxxxxxxxx>
diff -r 0f59ace5442c -r 67ea7868089b xen/include/asm-ia64/vmx.h
--- a/xen/include/asm-ia64/vmx.h Fri Feb 24 20:29:18 2006
+++ b/xen/include/asm-ia64/vmx.h Fri Feb 24 20:30:39 2006
@@ -34,7 +34,24 @@
extern void vmx_setup_platform(struct domain *d, struct vcpu_guest_context *c);
extern void vmx_wait_io(void);
extern void vmx_io_assist(struct vcpu *v);
-
+extern void vmx_load_all_rr(struct vcpu *vcpu);
+extern void panic_domain(struct pt_regs *regs, const char *fmt, ...);
+extern int ia64_hypercall (struct pt_regs *regs);
+extern void vmx_save_state(struct vcpu *v);
+extern void vmx_load_state(struct vcpu *v);
+extern void show_registers(struct pt_regs *regs);
+extern int vmx_alloc_contig_pages(struct domain *d);
+extern unsigned long __gpfn_to_mfn_foreign(struct domain *d, unsigned long
gpfn);
+extern void sync_split_caches(void);
+extern void vmx_virq_line_assist(struct vcpu *v);
+extern void set_privileged_operation_isr (struct vcpu *vcpu,int inst);
+extern void privilege_op (struct vcpu *vcpu);
+extern void set_ifa_itir_iha (struct vcpu *vcpu, u64 vadr,
+ int set_ifa, int set_itir, int set_iha);
+extern void inject_guest_interruption(struct vcpu *vcpu, u64 vec);
+extern void vmx_intr_assist(struct vcpu *v);
+extern void set_illegal_op_isr (struct vcpu *vcpu);
+extern void illegal_op (struct vcpu *vcpu);
static inline vcpu_iodata_t *get_vio(struct domain *d, unsigned long cpu)
{
return &((shared_iopage_t
*)d->arch.vmx_platform.shared_page_va)->vcpu_iodata[cpu];
diff -r 0f59ace5442c -r 67ea7868089b xen/include/asm-ia64/vmx_mm_def.h
--- a/xen/include/asm-ia64/vmx_mm_def.h Fri Feb 24 20:29:18 2006
+++ b/xen/include/asm-ia64/vmx_mm_def.h Fri Feb 24 20:30:39 2006
@@ -27,8 +27,6 @@
//#define VHPT_SIZE (1 << VHPT_SIZE_PS)
#define ARCH_PAGE_SHIFT 12
#define ARCH_PAGE_SIZE PSIZE(ARCH_PAGE_SHIFT)
-#define INVALID_MFN (-1)
-
#define MAX_PHYS_ADDR_BITS 50
#define PMASK(size) (~((size) - 1))
#define PSIZE(size) (1UL<<(size))
@@ -87,9 +85,6 @@
#define STLB_TC 0
#define STLB_TR 1
-#define VMM_RR_MASK 0xfffff
-#define VMM_RR_SHIFT 20
-
#define IA64_RR_SHIFT 61
#define PHYS_PAGE_SHIFT PPN_SHIFT
@@ -109,7 +104,6 @@
#define VRN_MASK 0xe000000000000000L
#define PTA_BASE_MASK 0x3fffffffffffL
-#define PTA_BASE_SHIFT 15
#define VHPT_OFFSET_MASK 0x7fff
#define BITS_SHIFT_256MB 28
@@ -145,6 +139,7 @@
uint64_t result;
__asm __volatile("shl %0=%1, %2;; shr.u %0=%0, %3;;"
: "=r" (result): "r"(v), "r"(63-be), "r" (bs+63-be) );
+ return result;
}
#define bits(val, bs, be) \
diff -r 0f59ace5442c -r 67ea7868089b xen/include/asm-ia64/vmx_pal.h
--- a/xen/include/asm-ia64/vmx_pal.h Fri Feb 24 20:29:18 2006
+++ b/xen/include/asm-ia64/vmx_pal.h Fri Feb 24 20:30:39 2006
@@ -114,7 +114,7 @@
PAL_CALL_STK(iprv, PAL_VP_SAVE, (u64)vpd, pal_proc_vector, 0);
return iprv.status;
}
-
+extern void pal_emul(struct vcpu *vcpu);
#define PAL_PROC_VM_BIT (1UL << 40)
#define PAL_PROC_VMSW_BIT (1UL << 54)
#endif /* _ASM_IA64_VT_PAL_H */
diff -r 0f59ace5442c -r 67ea7868089b xen/include/asm-ia64/vmx_phy_mode.h
--- a/xen/include/asm-ia64/vmx_phy_mode.h Fri Feb 24 20:29:18 2006
+++ b/xen/include/asm-ia64/vmx_phy_mode.h Fri Feb 24 20:30:39 2006
@@ -96,6 +96,8 @@
extern void recover_if_physical_mode(VCPU *vcpu);
extern void vmx_init_all_rr(VCPU *vcpu);
extern void vmx_load_all_rr(VCPU *vcpu);
+extern void physical_itlb_miss(VCPU *vcpu, u64 vadr);
+extern void physical_dtlb_miss(VCPU *vcpu, u64 vadr);
/*
* No sanity check here, since all psr changes have been
* checked in switch_mm_mode().
diff -r 0f59ace5442c -r 67ea7868089b xen/include/asm-ia64/vmx_vcpu.h
--- a/xen/include/asm-ia64/vmx_vcpu.h Fri Feb 24 20:29:18 2006
+++ b/xen/include/asm-ia64/vmx_vcpu.h Fri Feb 24 20:30:39 2006
@@ -51,8 +51,7 @@
#define VMM_RR_SHIFT 20
#define VMM_RR_MASK ((1UL<<VMM_RR_SHIFT)-1)
-//#define VRID_2_MRID(vcpu,rid) ((rid) & VMM_RR_MASK) | \
- ((vcpu->domain->domain_id) << VMM_RR_SHIFT)
+
extern u64 indirect_reg_igfld_MASK ( int type, int index, u64 value);
extern u64 cr_igfld_mask (int index, u64 value);
extern int check_indirect_reg_rsv_fields ( int type, int index, u64 value );
@@ -118,8 +117,9 @@
extern void memread_v(VCPU *vcpu, thash_data_t *vtlb, u64 *src, u64 *dest,
size_t s);
extern void memwrite_v(VCPU *vcpu, thash_data_t *vtlb, u64 *src, u64 *dest,
size_t s);
extern void memwrite_p(VCPU *vcpu, u64 *src, u64 *dest, size_t s);
-
-
+extern void vcpu_load_kernel_regs(VCPU *vcpu);
+extern IA64FAULT vmx_vcpu_increment_iip(VCPU *vcpu);
+extern void vmx_switch_rr7(unsigned long ,shared_info_t*,void *,void *,void *);
/**************************************************************************
VCPU control register access routines
**************************************************************************/
@@ -461,7 +461,6 @@
vmx_vrrtomrr(VCPU *v, unsigned long val)
{
ia64_rr rr;
- u64 rid;
rr.rrval=val;
rr.rid = rr.rid + v->arch.starting_rid;
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