ChangeSet 1.1369.1.2, 2005/03/30 09:49:22-07:00, djm@xxxxxxxxxxxxxxx
ivt.S:
ia64: oops, missing file for vhpt patch
ivt.S | 76 ++++++++++++++++++++++++++++++++----------------------------------
1 files changed, 37 insertions(+), 39 deletions(-)
diff -Nru a/xen/arch/ia64/patch/linux-2.6.7/ivt.S
b/xen/arch/ia64/patch/linux-2.6.7/ivt.S
--- a/xen/arch/ia64/patch/linux-2.6.7/ivt.S 2005-04-01 19:03:04 -05:00
+++ b/xen/arch/ia64/patch/linux-2.6.7/ivt.S 2005-04-01 19:03:04 -05:00
@@ -1,5 +1,5 @@
---- /home/djm/src/xen/xeno-ia64.bk/xen/linux-2.6.7/arch/ia64/kernel/ivt.S
2004-06-15 23:18:59.000000000 -0600
-+++ /home/djm/src/xen/xeno-ia64.bk/xen/arch/ia64/ivt.S 2004-12-17
13:47:03.000000000 -0700
+--- ../../linux-2.6.7/arch/ia64/kernel/ivt.S 2004-06-15 23:18:59.000000000
-0600
++++ arch/ia64/ivt.S 2005-03-28 20:16:02.000000000 -0700
@@ -1,3 +1,21 @@
+
+#ifdef XEN
@@ -36,49 +36,63 @@
.section .text.ivt,"ax"
.align 32768 // align on 32KB boundary
-@@ -213,6 +238,9 @@
+@@ -213,6 +238,13 @@
// 0x0400 Entry 1 (size 64 bundles) ITLB (21)
ENTRY(itlb_miss)
DBG_FAULT(1)
+#ifdef XEN
+ VHPT_CCHAIN_LOOKUP(itlb_miss,i)
++#ifdef VHPT_GLOBAL
++ br.cond.sptk page_fault
++ ;;
++#endif
+#endif
/*
* The ITLB handler accesses the L3 PTE via the virtually mapped linear
* page table. If a nested TLB miss occurs, we switch into physical
-@@ -257,6 +285,9 @@
+@@ -257,6 +289,13 @@
// 0x0800 Entry 2 (size 64 bundles) DTLB (9,48)
ENTRY(dtlb_miss)
DBG_FAULT(2)
+#ifdef XEN
+ VHPT_CCHAIN_LOOKUP(dtlb_miss,d)
++#ifdef VHPT_GLOBAL
++ br.cond.sptk page_fault
++ ;;
++#endif
+#endif
/*
* The DTLB handler accesses the L3 PTE via the virtually mapped linear
* page table. If a nested TLB miss occurs, we switch into physical
-@@ -301,6 +332,10 @@
+@@ -301,6 +340,13 @@
// 0x0c00 Entry 3 (size 64 bundles) Alt ITLB (19)
ENTRY(alt_itlb_miss)
DBG_FAULT(3)
+#ifdef XEN
-+// I think this is superfluous, once all regions have VHPT enabled
++//#ifdef VHPT_GLOBAL
+// VHPT_CCHAIN_LOOKUP(alt_itlb_miss,i)
++// br.cond.sptk page_fault
++// ;;
++//#endif
+#endif
mov r16=cr.ifa // get address that caused the TLB miss
movl r17=PAGE_KERNEL
mov r21=cr.ipsr
-@@ -339,6 +374,10 @@
+@@ -339,6 +385,13 @@
// 0x1000 Entry 4 (size 64 bundles) Alt DTLB (7,46)
ENTRY(alt_dtlb_miss)
DBG_FAULT(4)
+#ifdef XEN
-+// I think this is superfluous, once all regions have VHPT enabled
++//#ifdef VHPT_GLOBAL
+// VHPT_CCHAIN_LOOKUP(alt_dtlb_miss,d)
++// br.cond.sptk page_fault
++// ;;
++//#endif
+#endif
mov r16=cr.ifa // get address that caused the TLB miss
movl r17=PAGE_KERNEL
mov r20=cr.isr
-@@ -368,6 +407,17 @@
+@@ -368,6 +421,17 @@
cmp.ne p8,p0=r0,r23
(p9) cmp.eq.or.andcm p6,p7=IA64_ISR_CODE_LFETCH,r22 // check isr.code field
(p8) br.cond.spnt page_fault
@@ -96,7 +110,7 @@
dep r21=-1,r21,IA64_PSR_ED_BIT,1
or r19=r19,r17 // insert PTE control bits into r19
-@@ -448,6 +498,9 @@
+@@ -448,6 +512,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x1800 Entry 6 (size 64 bundles) Instruction Key Miss (24)
ENTRY(ikey_miss)
@@ -106,7 +120,7 @@
DBG_FAULT(6)
FAULT(6)
END(ikey_miss)
-@@ -460,9 +513,16 @@
+@@ -460,9 +527,16 @@
srlz.i
;;
SAVE_MIN_WITH_COVER
@@ -123,7 +137,7 @@
adds r3=8,r2 // set up second base pointer
;;
ssm psr.ic | PSR_DEFAULT_BITS
-@@ -483,6 +543,9 @@
+@@ -483,6 +557,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x1c00 Entry 7 (size 64 bundles) Data Key Miss (12,51)
ENTRY(dkey_miss)
@@ -133,7 +147,7 @@
DBG_FAULT(7)
FAULT(7)
END(dkey_miss)
-@@ -491,6 +554,9 @@
+@@ -491,6 +568,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x2000 Entry 8 (size 64 bundles) Dirty-bit (54)
ENTRY(dirty_bit)
@@ -143,7 +157,7 @@
DBG_FAULT(8)
/*
* What we do here is to simply turn on the dirty bit in the PTE. We
need to
-@@ -553,6 +619,9 @@
+@@ -553,6 +633,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x2400 Entry 9 (size 64 bundles) Instruction Access-bit (27)
ENTRY(iaccess_bit)
@@ -153,7 +167,7 @@
DBG_FAULT(9)
// Like Entry 8, except for instruction access
mov r16=cr.ifa // get the address that caused
the fault
-@@ -618,6 +687,9 @@
+@@ -618,6 +701,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x2800 Entry 10 (size 64 bundles) Data Access-bit (15,55)
ENTRY(daccess_bit)
@@ -163,7 +177,7 @@
DBG_FAULT(10)
// Like Entry 8, except for data access
mov r16=cr.ifa // get the address that caused
the fault
-@@ -686,6 +758,16 @@
+@@ -686,6 +772,16 @@
* to prevent leaking bits from kernel to user level.
*/
DBG_FAULT(11)
@@ -180,7 +194,7 @@
mov r16=IA64_KR(CURRENT) // r16 = current task; 12 cycle
read lat.
mov r17=cr.iim
mov r18=__IA64_BREAK_SYSCALL
-@@ -696,7 +778,9 @@
+@@ -696,7 +792,9 @@
mov r27=ar.rsc
mov r26=ar.pfs
mov r28=cr.iip
@@ -190,7 +204,7 @@
mov r20=r1
;;
adds r16=IA64_TASK_THREAD_ON_USTACK_OFFSET,r16
-@@ -792,6 +876,36 @@
+@@ -792,6 +890,36 @@
DBG_FAULT(13)
FAULT(13)
@@ -227,7 +241,7 @@
.org ia64_ivt+0x3800
/////////////////////////////////////////////////////////////////////////////////////////
// 0x3800 Entry 14 (size 64 bundles) Reserved
-@@ -842,9 +956,11 @@
+@@ -842,9 +970,11 @@
* - ar.fpsr: set to kernel settings
*/
GLOBAL_ENTRY(ia64_syscall_setup)
@@ -239,7 +253,7 @@
st8 [r1]=r19 // save b6
add r16=PT(CR_IPSR),r1 // initialize first base pointer
add r17=PT(R11),r1 // initialize second base
pointer
-@@ -974,6 +1090,37 @@
+@@ -974,6 +1104,37 @@
DBG_FAULT(16)
FAULT(16)
@@ -277,7 +291,7 @@
.org ia64_ivt+0x4400
/////////////////////////////////////////////////////////////////////////////////////////
// 0x4400 Entry 17 (size 64 bundles) Reserved
-@@ -1090,6 +1237,9 @@
+@@ -1090,6 +1251,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x5000 Entry 20 (size 16 bundles) Page Not Present (10,22,49)
ENTRY(page_not_present)
@@ -287,7 +301,7 @@
DBG_FAULT(20)
mov r16=cr.ifa
rsm psr.dt
-@@ -1110,6 +1260,9 @@
+@@ -1110,6 +1274,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x5100 Entry 21 (size 16 bundles) Key Permission (13,25,52)
ENTRY(key_permission)
@@ -297,7 +311,7 @@
DBG_FAULT(21)
mov r16=cr.ifa
rsm psr.dt
-@@ -1123,6 +1276,9 @@
+@@ -1123,6 +1290,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x5200 Entry 22 (size 16 bundles) Instruction Access Rights (26)
ENTRY(iaccess_rights)
@@ -307,7 +321,7 @@
DBG_FAULT(22)
mov r16=cr.ifa
rsm psr.dt
-@@ -1136,6 +1292,9 @@
+@@ -1136,6 +1306,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x5300 Entry 23 (size 16 bundles) Data Access Rights (14,53)
ENTRY(daccess_rights)
@@ -317,7 +331,7 @@
DBG_FAULT(23)
mov r16=cr.ifa
rsm psr.dt
-@@ -1153,8 +1312,13 @@
+@@ -1153,8 +1326,13 @@
mov r16=cr.isr
mov r31=pr
;;
@@ -331,7 +345,7 @@
;;
mov r19=24 // fault number
br.sptk.many dispatch_to_fault_handler
-@@ -1164,6 +1328,9 @@
+@@ -1164,6 +1342,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x5500 Entry 25 (size 16 bundles) Disabled FP-Register (35)
ENTRY(disabled_fp_reg)
@@ -341,7 +355,7 @@
DBG_FAULT(25)
rsm psr.dfh // ensure we can access fph
;;
-@@ -1177,6 +1344,9 @@
+@@ -1177,6 +1358,9 @@
/////////////////////////////////////////////////////////////////////////////////////////
// 0x5600 Entry 26 (size 16 bundles) Nat Consumption (11,23,37,50)
ENTRY(nat_consumption)
@@ -351,7 +365,7 @@
DBG_FAULT(26)
FAULT(26)
END(nat_consumption)
-@@ -1185,6 +1355,10 @@
+@@ -1185,6 +1369,10 @@
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